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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 3962 occurrences of 1873 keywords
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Results
Found 7741 publication records. Showing 7739 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
34 | Ahmad A. Al-Yamani, Narendra Devta-Prasanna, Erik Chmelar, M. Grinchuk, Arun Gunda |
Scan Test Cost and Power Reduction Through Systematic Scan Reconfiguration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(5), pp. 907-918, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
34 | Li-Chung Hsu, Hung-Ming Chen |
On Optimizing Scan Testing Power and Routing Cost in Scan Chain Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 7th International Symposium on Quality of Electronic Design (ISQED 2006), 27-29 March 2006, San Jose, CA, USA, pp. 451-456, 2006, IEEE Computer Society, 0-7695-2523-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
34 | Shalini Ghosh, Sugato Basu, Nur A. Touba |
Joint Minimization of Power and Area in Scan Testing by Scan Cell Reordering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), New Trends and Technologies for VLSI Systems Design, 20-21 February 2003, Tampa, FL, USA, pp. 246-249, 2003, IEEE Computer Society, 0-7695-1904-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
34 | Kenneth P. Parker |
Defect Coverage of Boundary-Scan Tests: What does it mean when a Boundary-Scan test passes? ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte, NC, USA, pp. 1268-1276, 2003, IEEE Computer Society, 0-7803-8106-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
34 | Xijiang Lin, Irith Pomeranz, Sudhakar M. Reddy |
Full Scan Fault Coverage With Partial Scan. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 1999 Design, Automation and Test in Europe (DATE '99), 9-12 March 1999, Munich, Germany, pp. 468-472, 1999, IEEE Computer Society / ACM, 0-7695-0078-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
32 | Lei Shi, Vandana Pursnani Janeja |
Anomalous Window Discovery for Linear Intersecting Paths. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Knowl. Data Eng. ![In: IEEE Trans. Knowl. Data Eng. 23(12), pp. 1857-1871, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
spatial scan window, linear scan statistic, anomaly detection, Spatial scan statistics |
31 | Young-Ho Choi, Se-Young Oh |
Grid-Based Visual SLAM in Complex Environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Intell. Robotic Syst. ![In: J. Intell. Robotic Syst. 50(3), pp. 241-255, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Visual sonar, Pseudo dense scan, Trajectory correction, Scan matching |
31 | Chen-Huan Chiang, Sandeep K. Gupta 0001 |
BIST TPG for SRAM cluster interconnect testing at board level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, pp. 58-65, 2000, IEEE Computer Society, 0-7695-0887-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
SRAM cluster interconnect testing, BIST TPG, static random access memory, board-level interconnects, test pattern generation architecture, IEEE 1149.1 boundary scan architecture, prohibited conditions, testable SRAM cluster interconnect fault detection, logic testing, built-in self test, automatic test pattern generation, test pattern generation, boundary scan testing, integrated circuit interconnections, SRAM chips, printed circuit testing |
31 | Masayuki Tsukisaka, Takashi Nanya |
A testable design for asynchronous fine-grain pipeline circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PRDC ![In: 2000 Pacific Rim International Symposium on Dependable Computing (PRDC 2000), 18-20 December 2000, Los Angeles, CA, USA, pp. 148-155, 2000, IEEE Computer Society, 0-7695-0975-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
asynchronous fine-grain pipeline circuits, dynamic gates, high-performance datapath design, pipeline latches, scan latch libraries, logic testing, logic CAD, SPICE, CMOS technology, scan path, SPICE simulation, testable design |
31 | Kaushik De |
Test methodology for embedded cores which protects intellectual property. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 15th IEEE VLSI Test Symposium (VTS'97), April 27-May 1, 1997, Monterey, California, USA, pp. 2-9, 1997, IEEE Computer Society, 0-8186-7810-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
core I/Os, ASIC I/O inaccessibility, partial netlist generation, ASIC level test generation, gate testing, core scan chain, selective boundary scan, coreware design paradigm, logic testing, heuristic algorithm, structural analysis, intellectual property protection, embedded cores, test methodology |
31 | Chunduri Rama Mohan, Srobona Mitra, Partha Pal Chaudhuri |
On Incorporation of BIST for the Synthesis of Easily and Fully Testable Controllers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 10th International Conference on VLSI Design (VLSI Design 1997), 4-7 January 1997, Hyderabad, India, pp. 547-563, 1997, IEEE Computer Society, 0-8186-7755-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
fully testable controllers, testing scheme, Cadence, target library, built-in self test, cellular automata, VHDL, ATPGs, BIST, testability, FSMs, partial scan, VERILOG, area overhead, RTL designs, SYNERGY, full scan, stuck-at fault model |
31 | S. Lavabre, Yves Bertrand, Michel Renovell, Christian Landrault |
Test configurations to enhance the testability of sequential circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 4th Asian Test Symposium (ATS '95), November 23-24, 1995. Bangalore, India, pp. 160-168, 1995, IEEE Computer Society, 0-8186-7129-7. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
shift operation, scan register, test operation, modified flip-flops, ISCAS89 benchmarks, multiconfiguration, triconfiguration, dynamic generation, logic testing, controllability, design for testability, design for testability, sequential circuits, sequential circuits, observability, observability, DFT, fault coverage, flip-flops, minimisation, scan designs, test application time, test vector |
31 | Jacob Savir |
Generator choices for delay test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 4th Asian Test Symposium (ATS '95), November 23-24, 1995. Bangalore, India, pp. 214-221, 1995, IEEE Computer Society, 0-8186-7129-7. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
BIST based delay test, generator choices, delay test vector generator, nonscan designs, transition test, skewed-load delay test, shift dependency, digital logic circuits, performance, VLSI, fault diagnosis, logic testing, delays, built-in self test, integrated circuit testing, ATPG, automatic testing, flexibility, linear feedback shift register, cost, shift registers, scan designs, boundary scan testing, test vectors, timing requirement, pseudo-random test |
31 | Douglas W. Cornell, Philip S. Yu |
An Effective Approach to Vertical Partitioning for Physical Design of Relational Databases. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 16(2), pp. 248-258, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
two-step methodology, binary partitioning, sort-merge, segment scan, cluster index scan, software engineering, relational databases, relational databases, linear programming, physical design, integer linear programming, join, vertical partitioning, query analysis, disk accesses |
31 | Janusz Rajski, Jerzy Tyszer |
Diagnosis of Scan Cells in BIST Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 48(7), pp. 724-731, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
multiple scan chains, fault diagnosis, Built-in self-test, design for testability, test-response compaction, scan-based design |
31 | Kuen-Jong Lee, Jih-Jeen Chen, Cheng-Hua Huang |
Using a single input to support multiple scan chains. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1998, San Jose, CA, USA, November 8-12, 1998, pp. 74-78, 1998, ACM / IEEE Computer Society, 1-58113-008-2. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
boundary scan (IEEE 1149.1) and test compaction, test generation, design for testability, scan based design |
31 | Rajesh Gupta 0003, Rajiv Gupta 0002, Melvin A. Breuer |
The BALLAST Methodology for Structured Partial Scan Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 39(4), pp. 538-544, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
scan path storage elements, Ballast methodology, structured partial scan design, balanced structure scant test, testability properties, combinatorial automatic test pattern generation, logic testing, sequential circuits, automatic testing, combinatorial circuits |
31 | Zhijing G. Mou, Hai Liu 0012, Paul Hudak |
Compress-and-conquer for optimal multicore computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAMP ![In: Proceedings of the POPL 2010 Workshop on Declarative Aspects of Multicore Programming, DAMP 2010, Madrid, Spain, January 19, 2010, pp. 35-44, 2010, ACM, 978-1-60558-859-9. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
compress and conquer, parallel computing, functional programming, scan, divide and conquer, programming paradigm, multicore programming |
31 | Matthew G. Stout, Kenneth P. Tumin |
Innovative Test Solutions for Pin-Limited Microcontrollers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 437-440, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Freescale, Stout, Tumin, test, testing, DFT, scan, microcontroller, design-for-test, pins |
31 | Terumine Hayashi, Haruna Yoshioka, Tsuyoshi Shinogi, Hidehiko Kita, Haruhiko Takase |
On Test Data Compression Using Selective Don't-Care Identification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Sci. Technol. ![In: J. Comput. Sci. Technol. 20(2), pp. 210-215, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
multiple scan structure, dont-care identification, test data compression, test cost reduction |
31 | Daniel B. Neill, Andrew W. Moore 0001, Maheshkumar Sabhnani, Kenny Daniel |
Detection of emerging space-time clusters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
KDD ![In: Proceedings of the Eleventh ACM SIGKDD International Conference on Knowledge Discovery and Data Mining, Chicago, Illinois, USA, August 21-24, 2005, pp. 218-227, 2005, ACM, 1-59593-135-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
cluster detection, space-time scan statistics, biosurveillance |
31 | Andrea Frosini, Maurice Nivat |
Binary Matrices Under the Microscope: A Tomographical Problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWCIA ![In: Combinatorial Image Analysis, 10th InternationalWorkshop, IWCIA 2004, Auckland, New Zealand, December 1-3, 2004, Proceedings, pp. 1-22, 2004, Springer, 3-540-23942-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Reconstruction algorithm, Rectangular scan, Computational complexity, Projection, Discrete Tomography |
31 | Egor S. Sogomonyan, Adit D. Singh, Michael Gössel |
A Multi-Mode Scannable Memory Element for High Test Application Efficiency and Delay Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 15(1-2), pp. 87-96, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
design-for-testability, BIST, scan design |
31 | Debaditya Mukherjee, Melvin A. Breuer |
An IEEE 1149.1 Compliant Test Control Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 13(3), pp. 273-297, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
test control, local test control, distributed test control, dynamic test control, built-in self-test, design-for-test, boundary scan, test bus |
31 | Phillip Krueger, Ten-Hwang Lai, Vibha A. Dixit-Radiya |
ob Scheduling is More Important than Processor Allocation for Hypercube Computers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 5(5), pp. 488-497, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
hypercubecomputers, scheduling, scheduling, resource allocation, hypercube, hypercube networks, job scheduling, Scan, processor allocation, performance problems |
30 | Christian Wimmer, Michael Franz |
Linear scan register allocation on SSA form. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CGO ![In: Proceedings of the CGO 2010, The 8th International Symposium on Code Generation and Optimization, Toronto, Ontario, Canada, April 24-28, 2010, pp. 170-179, 2010, ACM, 978-1-60558-635-9. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
SSA form deconstruction, lifetime analysis, linear scan, Java, register allocation, just-in-time compilation, SSA form |
30 | Maciej Nikodem |
Boundary Scan Security Enhancements for a Cryptographic Hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROCAST ![In: Computer Aided Systems Theory - EUROCAST 2009, 12th International Conference, Las Palmas de Gran Canaria, Spain, February 15-20, 2009, Revised Selected Papers, pp. 91-97, 2009, Springer, 978-3-642-04771-8. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
IEEE 1149, side-channel attacks, countermeasures, boundary scan |
30 | Matthew K. Feusner, Brian Lukoff |
Testing for statistically significant differences between groups of scan patterns. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETRA ![In: Proceedings of the Eye Tracking Research & Application Symposium, ETRA 2008, Savannah, Georgia, USA, March 26-28, 2008, pp. 43-46, 2008, ACM, 978-1-59593-982-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
scan pattern, similarity test, eye tracking, analysis, statistics, comparison, sequence comparison, scanpath |
30 | Shuhui Yang, Minglu Li 0001, Jie Wu 0001 |
Scan-Based Movement-Assisted Sensor Deployment Methods in Wireless Sensor Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 18(8), pp. 1108-1121, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Dimension exchange., Hungarian method, movement-assisted, wireless sensor networks, load balance, scan, sensor deployment |
30 | Grzegorz Mrugalski, Janusz Rajski, Chen Wang 0014, Artur Pogiel, Jerzy Tyszer |
Isolation of Failing Scan Cells through Convolutional Test Response Compaction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 23(1), pp. 35-45, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
convolutional compactors, fault diagnosis, test response compaction, scan-based designs |
30 | Ilia Polian, Hideo Fujiwara |
Functional Constraints vs. Test Compression in Scan-Based Delay Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 23(5), pp. 445-455, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Overtesting prevention, Scan-based delay test, Test compression, Functional constraints |
30 | Qiming Wang, Sandy Ressler |
Generation and manipulation of H-Anim CAESAR scan bodies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Web3D ![In: Proceeding of the Twelfth International Conference on 3D Web Technology, Web3D 2007, Perugia, Italy, April 15-18, 2007, pp. 191-194, 2007, ACM, 978-1-59593-652-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
CAESAR, VRML, 3D scan, 3D animation, H-Anim |
30 | Young Lim Choi, Yunja Nam, Kueng Mi Choi, Ming Hai Cui |
A Method for Garment Pattern Generation by Flattening 3D Body Scan Data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HCI (12) ![In: Digital Human Modeling, First International Conference on Digital Human Modeling, ICDHM 2007, Held as Part of HCI International 2007, Beijing, China, July 22-27, 2007, Proceedings, pp. 803-812, 2007, Springer, 978-3-540-73318-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
3D scan data, apparel pattern, grid method, silhouette, flattening |
30 | Qian Li |
Practice of Video Encryption Algorithms Based on Chaotic Sequence and Scan Pattern. ![Search on Bibsonomy](Pics/bibsonomy.png) |
KES (2) ![In: Knowledge-Based Intelligent Information and Engineering Systems, 11th International Conference, KES 2007, XVII Italian Workshop on Neural Networks, Vietri sul Mare, Italy, September 12-14, 2007. Proceedings, Part II, pp. 225-232, 2007, Springer, 978-3-540-74826-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
scan methodology, difference matrix, difference-compressed matrix, Video encryption, chaotic sequence |
30 | Ilia Polian, Hideo Fujiwara |
Functional constraints vs. test compression in scan-based delay testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 1039-1044, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-1-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
overtesting prevention, scan-based delay test, test compression, functional constraints |
30 | Juha Havukumpu, Pia Vähäkangas, Eija Grönroos, Jukka Häkkinen |
Midwives experiences of using HMD in ultrasound scan. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NordiCHI ![In: Proceedings of the 4th Nordic Conference on Human-Computer Interaction 2006, Oslo, Norway, October 14-18, 2006, pp. 369-372, 2006, ACM, 1-59593-325-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
patient-midwife communication, ultrasound scan, user experience, head-mounted displays |
30 | Irith Pomeranz, Sudhakar M. Reddy |
Static Test Compaction for Full-Scan Circuits Based on Combinational Test Sets and Nonscan Input Sequences and a Lower Bound on the Number of Tests. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 53(12), pp. 1569-1581, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Scan circuits, test application time, static test compaction |
30 | Irith Pomeranz |
Scan-BIST based on transition probabilities. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 940-943, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
built-in self-test, scan design |
30 | Qianren Xu, Mohamed Kamel, Magdy M. A. Salama |
A Spatially Adaptive Filter Reducing Arc Stripe Noise for Sector Scan Medical Ultrasound Imaging. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIAR (2) ![In: Image Analysis and Recognition: International Conference, ICIAR 2004, Porto, Portugal, September 29-October 1, 2004, Proceedings, Part II, pp. 25-32, 2004, Springer, 3-540-23240-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Arc stripe noise, radial noise reduction, sector scan, ultrasonic image |
30 | Ismet Bayraktaroglu, Alex Orailoglu |
Concurrent Application of Compaction and Compression for Test Time and Data Volume Reduction in Scan Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 52(11), pp. 1480-1489, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Test pattern compression, test pattern compaction, on-chip decompression, deterministic decompression, scan chains |
30 | Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Nikolos |
A highly regular multi-phase reseeding technique for scan-based BIST. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, Washington, DC, USA, April 28-29, 2003, pp. 295-298, 2003, ACM, 1-58113-677-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
scan-based schemes, built-in self-test, linear feedback shift registers, reseeding |
30 | Mohammad H. Tehranipour, Nisar Ahmed, Mehrdad Nourani |
Testing SoC Interconnects for Signal Integrity Using Boundary Scan. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 21st IEEE VLSI Test Symposium (VTS 2003), 27 April - 1 May 2003, Napa Valley, CA, USA, pp. 158-172, 2003, IEEE Computer Society, 0-7695-1924-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Integrity Loss Sensor, System-on-Chip Interconnects, Data Compression, Boundary Scan, Signal Integrity |
30 | Hak-soo Yu, Jacob A. Abraham |
An Efficient 3-Bit -Scan Multiplier without Overlapping Bits, and Its 64x64 Bit Implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC/VLSI Design ![In: Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), and the 15th International Conference on VLSI Design (VLSI Design 2002), Bangalore, India, January 7-11, 2002, pp. 441-446, 2002, IEEE Computer Society, 0-7695-1299-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
3-bit-scan, power-delay-area tradeoffs, synchronous sequential, multiplier, partial product |
30 | Laurence Tianruo Yang, Zebo Peng |
Incremental Testability Analysis for Partial Scan Selection and Design Transformations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 14(1-2), pp. 103-113, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
incremental testability analysis, partial scan selection, design transformation, register transfer level, high-level test synthesis |
30 | Chris Feige, Jan Ten Pierick, Clemens Wouters, Ronald J. W. T. Tangelder, Hans G. Kerkhoff |
Integration of the Scan-Test Method into an Architecture Specific Core-Test Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 14(1-2), pp. 125-131, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
bus-transfer, core reuse, test protocol, TIC, TTM, vector transfer, design-for-testability, ATPG, scan-test, AMBA |
30 | Zulan Huang, Yizheng Ye, Zhigang Mao |
A New Algorithm for Retiming-Based Partial Scan. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 8th Asian Test Symposium (ATS '99), 16-18 November 1999, Shanghai, China, pp. 327-, 1999, IEEE Computer Society, 0-7695-0315-2. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
retiming, Partial scan, minimum feedback vertex set |
30 | Wenyi Feng, Fred J. Meyer, Fabrizio Lombardi |
Novel Control Pattern Generators for Interconnect Testing with Boundary Scan. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 14th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '99), November 1-3, 1999, Albuquerque, NM, USA, Proceedings, pp. 112-120, 1999, IEEE Computer Society, 0-7695-0325-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
BIST, boundary scan, Interconnect testing |
30 | Toshinori Hosokawa, Toshihiro Hiraoka, Mitsuyasu Ohta, Michiaki Muraoka, Shigeo Kuninobu |
A Partial Scan Design Method Based on n-Fold Line-up Structures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 6th Asian Test Symposium (ATS '97), 17-18 November 1997, Akita, Japan, pp. 306-, 1997, IEEE Computer Society, 0-8186-8209-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
n-fold line-up structure, dynamic test sequence compaction, flip-flop of load/hold type, fault efficiency, state justification, partial scan |
30 | Srimat T. Chakradhar, Arun Balakrishnan, Vishwani D. Agrawal |
An exact algorithm for selecting partial scan flip-flops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 7(1-2), pp. 83-93, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
multiway search and integer linear program, partial scan, minimum feedback vertex set |
30 | Prashant S. Parikh, Miron Abramovici |
Testability-based partial scan analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 7(1-2), pp. 61-70, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
testability cost, sensitivity analysis, partial scan |
30 | Slawomir Pilarski, André Ivanov, Tiko Kameda |
On minimizing aliasing in scan-based compaction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 5(1), pp. 83-90, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
built-in self-test, linear feedback shift register, signature analysis, Aliasing probability, scan path, test response compaction |
30 | Bernhard Eschermann |
An implicitly testable boundary scan TAP controller. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 3(2), pp. 159-169, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
test controller, BIST, self-test, boundary scan, synthesis for testability, controller design |
30 | Kenneth P. Parker, Stig Oresjo |
A language for describing boundary scan devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 2(1), pp. 43-75, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
boundary scan testability, VHDL |
30 | Dongdong Zhang, Xiaoping Qian |
Scanning in atomic force microscopy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICRA ![In: 2009 IEEE International Conference on Robotics and Automation, ICRA 2009, Kobe, Japan, May 12-17, 2009, pp. 532-537, 2009, IEEE. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
30 | Cheng-Han Tsai, Tai-Yi Huang, Edward T.-H. Chu, Chun-Hang Wei, Yu-Che Tsai |
An Efficient Real-Time Disk-Scheduling Framework with Adaptive Quality Guarantee. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 57(5), pp. 634-657, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
real-time disk-scheduling algorithms, Scheduling, Performance evaluation, Performance, Real-time systems, Imprecise computation, weighted round-robin |
30 | Seongmoon Wang, Wenlong Wei |
An Efficient Unknown BlockingScheme for Low Control Data Volume and High Observability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(11), pp. 2039-2052, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
30 | Joon-Sung Yang, Nur A. Touba |
Enhancing Silicon Debug via Periodic Monitoring. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 1-3 October 2008, Boston, MA, USA, pp. 125-133, 2008, IEEE Computer Society, 978-0-7695-3365-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
30 | Seongmoon Wang, Wenlong Wei, Srimat T. Chakradhar |
Unknown blocking scheme for low control data volume and high observability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 33-38, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
30 | Chia-Yi Lin, Hung-Ming Chen |
A selective pattern-compression scheme for power and test-data reduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2007 International Conference on Computer-Aided Design, ICCAD 2007, San Jose, CA, USA, November 5-8, 2007, pp. 520-525, 2007, IEEE Computer Society, 1-4244-1382-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
30 | Richard Putman, Nur A. Touba |
Using Multiple Expansion Ratios and Dependency Analysis to Improve Test Compression. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 25th IEEE VLSI Test Symposium (VTS 2007), 6-10 May 2007, Berkeley, California, USA, pp. 211-218, 2007, IEEE Computer Society, 0-7695-2812-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
30 | Ahmad A. Al-Yamani, Subhasish Mitra, Edward J. McCluskey |
Optimized reseeding by seed ordering and encoding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(2), pp. 264-270, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
30 | Man-Soon Kim, Sang-Wook Kim, Miyoung Shin |
Optimization of subsequence matching under time warping in time-series databases. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAC ![In: Proceedings of the 2005 ACM Symposium on Applied Computing (SAC), Santa Fe, New Mexico, USA, March 13-17, 2005, pp. 581-586, 2005, ACM, 1-58113-964-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
time warping, time-series databases, subsequence matching |
30 | Mohammed ElShoukry, Mohammad Tehranipoor, C. P. Ravikumar |
Partial Gating Optimization for Power Reduction During Test Application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 14th Asian Test Symposium (ATS 2005), 18-21 December 2005, Calcutta, India, pp. 242-247, 2005, IEEE Computer Society, 0-7695-2481-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
30 | Lei Li 0036, Krishnendu Chakrabarty, Seiji Kajihara, Shivakumar Swaminathan |
Efficient Space/Time Compression to Reduce Test Data Volume and Testing Time for IP Cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India, pp. 53-58, 2005, IEEE Computer Society, 0-7695-2264-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
30 | Pedram Azad, Tilo Gockel, Rüdiger Dillmann |
3D Shape Acquisition using a combined SSD and Least Squares Correlation Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITCC (2) ![In: International Conference on Information Technology: Coding and Computing (ITCC'04), Volume 2, April 5-7, 2004, Las Vegas, Nevada, USA, pp. 367-371, 2004, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Least Squares Correlation, Pattern Projector, Single Shot, 3D Shape Acquisition, 3D Scanning, SSD, Structured Light |
30 | Ramesh C. Tekumalla |
On Reducing Aliasing Effects and Improving Diagnosis of Logic BIST Failures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte, NC, USA, pp. 737-744, 2003, IEEE Computer Society, 0-7803-8106-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
30 | Xiao Liu 0010, Michael S. Hsiao, Sreejit Chakravarty, Paul J. Thadikaran |
Techniques to Reduce Data Volume and Application Time for Transition Test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2002, Baltimore, MD, USA, October 7-10, 2002, pp. 983-992, 2002, IEEE Computer Society, 0-7803-7543-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
30 | Srimat T. Chakradhar, Anand Raghunathan |
Bottleneck removal algorithm for dynamic compaction in sequential circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(10), pp. 1157-1172, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
30 | Robert B. Norwood, Edward J. McCluskey |
High-Level Synthesis for Orthogonal Sca. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 15th IEEE VLSI Test Symposium (VTS'97), April 27-May 1, 1997, Monterey, California, USA, pp. 370-375, 1997, IEEE Computer Society, 0-8186-7810-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
30 | Marie Engelene J. Obien, Satoshi Ohtake, Hideo Fujiwara |
F-Scan Test Generation Model for Delay Fault Testing at RTL Using Standard Full Scan ATPG. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: 16th European Test Symposium, ETS 2011, Trondheim, Norway, May 23-27, 2011, pp. 203, 2011, IEEE Computer Society, 978-0-7695-4433-5. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
automatic test pattern generation, scan-based test, high-level testing |
30 | Jean DaRolt, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre |
Scan Attacks and Countermeasures in Presence of Scan Response Compactors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: 16th European Test Symposium, ETS 2011, Trondheim, Norway, May 23-27, 2011, pp. 19-24, 2011, IEEE Computer Society, 978-0-7695-4433-5. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
scan-based attack, security, testability, response compaction |
30 | Peichen Pan, C. L. Liu 0001 |
Partial Scan with Preselected Scan Signals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 48(9), pp. 1000-1005, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
design for testability, retiming, partial scan, Digital testing |
30 | Daniel P. Lopresti, George Nagy, Elisa H. Barney Smith |
Document analysis issues in reading optical scan ballots. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Document Analysis Systems ![In: The Ninth IAPR International Workshop on Document Analysis Systems, DAS 2010, June 9-11, 2010, Boston, Massachusetts, USA, pp. 105-112, 2010, ACM, 978-1-60558-773-8. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
30 | Emili Hernández, Pere Ridao, David Ribas, Angelos Mallios |
Probabilistic sonar scan matching for an AUV. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IROS ![In: 2009 IEEE/RSJ International Conference on Intelligent Robots and Systems, October 11-15, 2009, St. Louis, MO, USA, pp. 255-260, 2009, IEEE, 978-1-4244-3803-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
30 | Xrysovalantis Kavousianos, Emmanouil Kalligeros, Dimitris Nikolos |
Multilevel-Huffman Test-Data Compression for IP Cores With Multiple Scan Chains. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 16(7), pp. 926-931, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
30 | Antoni Burguera, Yolanda González Cid, Gabriel Oliver |
The likelihood field approach to sonar scan matching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IROS ![In: 2008 IEEE/RSJ International Conference on Intelligent Robots and Systems, September 22-26, 2008, Acropolis Convention Center, Nice, France, pp. 2977-2982, 2008, IEEE, 978-1-4244-2057-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
30 | Yu Hu 0001, Xiang Fu 0007, Xiaoxin Fan, Hideo Fujiwara |
Localized random access scan: Towards low area and routing overhead. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 13th Asia South Pacific Design Automation Conference, ASP-DAC 2008, Seoul, Korea, January 21-24, 2008, pp. 565-570, 2008, IEEE, 978-1-4244-1921-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
30 | Xiaojun Jiang, Nan Liu, Renyi Liu, Tianhe Yin |
Study and Implementation of the Methods of the Side-scan Sonar Image Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSSE (6) ![In: International Conference on Computer Science and Software Engineering, CSSE 2008, Volume 6: Graphic Communication / Other Applications, December 12-14, 2008, Wuhan, China, pp. 109-112, 2008, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
30 | Mukesh Agrawal, Sandip Karmakar, Dhiman Saha, Debdeep Mukhopadhyay |
Scan Based Side Channel Attacks on Stream Ciphers and Their Counter-Measures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
INDOCRYPT ![In: Progress in Cryptology - INDOCRYPT 2008, 9th International Conference on Cryptology in India, Kharagpur, India, December 14-17, 2008. Proceedings, pp. 226-238, 2008, Springer, 978-3-540-89753-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
30 | Lifeng He, Yuyan Chao, Kenji Suzuki 0001 |
A Linear-Time Two-Scan Labeling Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIP (5) ![In: Proceedings of the International Conference on Image Processing, ICIP 2007, September 16-19, 2007, San Antonio, Texas, USA, pp. 241-244, 2007, IEEE, 978-1-4244-1436-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
30 | Antoni Burguera, Yolanda González Cid, Gabriel Oliver |
Probabilistic sonar filtering in scan matching localization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IROS ![In: 2007 IEEE/RSJ International Conference on Intelligent Robots and Systems, October 29 - November 2, 2007, Sheraton Hotel and Marina, San Diego, California, USA, pp. 4158-4163, 2007, IEEE, 978-1-4244-0912-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
30 | Vivek Sarkar, Rajkishore Barik |
Extended Linear Scan: An Alternate Foundation for Global Register Allocation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CC ![In: Compiler Construction, 16th International Conference, CC 2007, Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2007, Braga, Portugal, March 26-30, 2007, Proceedings, pp. 141-155, 2007, Springer, 978-3-540-71228-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
30 | Baojun Zhang, Jiebing Wang, Xuezeng Pan |
Virus Scan System Based on Hardware-Acceleration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IMSCCS ![In: Proceeding of the Second International Multi-Symposium of Computer and Computational Sciences (IMSCCS 2007), August 13-15, 2007, The University of Iowa, Iowa City, Iowa, USA, pp. 344-351, 2007, IEEE Computer Society, 0-7695-3039-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
YUQUAN, HPM, Frox, Hpmd, Concurrency |
30 | Gefu Xu, Adit D. Singh |
Delay Test Scan Flip-Flop: DFT for High Coverage Delay Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India, pp. 763-768, 2007, IEEE Computer Society, 0-7695-2762-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
30 | Xinming Liu, C. C. Shaw, M. C. Altunbas, Tianpeng Wang |
An alternate line erasure and readout (ALER) method for implementing slot-scan imaging technique with a flat-panel detector-initial experiences. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Medical Imaging ![In: IEEE Trans. Medical Imaging 25(4), pp. 496-502, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
30 | David Hély, Frédéric Bancel, Marie-Lise Flottes, Bruno Rouzeyre |
A secure scan design methodology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 1177-1178, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-1-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
30 | Irith Pomeranz, Sudhakar M. Reddy |
Test compaction for transition faults under transparent-scan. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 1264-1269, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-1-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
30 | Marcin Gomulkiewicz, Maciej Nikodem, Tadeusz Tomczak |
Low-cost and Universal Secure Scan: a Design- Architecture for Crypto Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DepCoS-RELCOMEX ![In: 2006 International Conference on Dependability of Computer Systems (DepCoS-RELCOMEX 2006), 24-28 May 2006, Szklarska Poreba, Poland, pp. 282-288, 2006, IEEE Computer Society, 0-7695-2565-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
30 | Gefu Xu, Adit D. Singh |
Low Cost Launch-on-Shift Delay Test with Slow Scan Enable. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: 11th European Test Symposium, ETS 2006, Southhampton, UK, May 21-24, 2006, pp. 9-14, 2006, IEEE Computer Society, 0-7695-2566-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
30 | Jian Zhang 0076, Sei-ichiro Kamata, Yoshifumi Ueshige |
A Pseudo-hilbert Scan Algorithm for Arbitrarily-Sized Rectangle Region. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWICPAS ![In: Advances in Machine Vision, Image Processing, and Pattern Analysis, International Workshop on Intelligent Computing in Pattern Analysis/Synthesis, IWICPAS 2006, Xi'an, China, August 26-27, 2006, Proceedings, pp. 290-299, 2006, Springer, 3-540-37597-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
30 | Shibaji Banerjee, Dipanwita Roy Chowdhury, Bhargab B. Bhattacharya |
An Efficient Scan Tree Design for Compact Test Pattern Set. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 19th International Conference on VLSI Design (VLSI Design 2006), 3-7 January 2006, Hyderabad, India, pp. 175-180, 2006, IEEE Computer Society, 0-7695-2502-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
30 | Chao-Shen Chen, Rong-Jian Chen |
Image Encryption and Decryption Using SCAN Methodology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDCAT ![In: Seventh International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT 2006), 4-7 December 2006, Taipei, Taiwan, pp. 61-66, 2006, IEEE Computer Society, 0-7695-2736-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
30 | Nabil Badereddine, Patrick Girard 0001, Arnaud Virazel, Serge Pravossoudovitch, Christian Landrault |
Controlling Peak Power Consumption During Scan Testing: Power-Aware DfT and Test Set Perspectives. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings, pp. 540-549, 2005, Springer, 3-540-29013-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
30 | Varun Arora, Indranil Sengupta 0001 |
A Unified Approach to Partial Scan Design using Genetic Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 14th Asian Test Symposium (ATS 2005), 18-21 December 2005, Calcutta, India, pp. 414-421, 2005, IEEE Computer Society, 0-7695-2481-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
30 | Dong Hyun Baik, Kewal K. Saluja |
State-reuse Test Generation for Progressive Random Access Scan: Solution to Test Power, Application Time and Data Size. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 14th Asian Test Symposium (ATS 2005), 18-21 December 2005, Calcutta, India, pp. 272-277, 2005, IEEE Computer Society, 0-7695-2481-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
30 | Irith Pomeranz, Sudhakar M. Reddy |
Improving the stuck-at fault coverage of functional test sequences by using limited-scan operations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 12(7), pp. 780-788, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
30 | Il-soo Lee, Yong Min Hur, Tony Ambler |
The Efficient Multiple Scan Chain Architecture Reducing Power Dissipation and Test Time. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 13th Asian Test Symposium (ATS 2004), 15-17 November 2004, Kenting, Taiwan, pp. 94-97, 2004, IEEE Computer Society, 0-7695-2235-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
30 | Nan-Cheng Lai, Sying-Jyan Wang, Yu-Hsuan Fu |
Low Power BIST with Smoother and Scan-Chain Reorder . ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 13th Asian Test Symposium (ATS 2004), 15-17 November 2004, Kenting, Taiwan, pp. 40-45, 2004, IEEE Computer Society, 0-7695-2235-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
30 | Jiann-Chyi Rau, Ching-Hsiu Lin, Jun-Yi Chang |
An Efficient Low-Overhead Policy for Constructing Multiple Scan-Chains. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 13th Asian Test Symposium (ATS 2004), 15-17 November 2004, Kenting, Taiwan, pp. 82-87, 2004, IEEE Computer Society, 0-7695-2235-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
30 | Ad J. van de Goor, Said Hamdioui, Zaid Al-Ars |
The Effectiveness of the Scan Test and Its New Variants. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTDT ![In: 12th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2004), 9-10 August 2004, San Jose, CA, USA, pp. 26-31, 2004, IEEE Computer Society, 0-7695-2193-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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