Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
95 | Bill Eklow, Carl Barnhart, Mike Ricchetti, Terry Borroz |
IEEE 1149.6 - A Practical Perspective. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte, NC, USA, pp. 494-502, 2003, IEEE Computer Society, 0-7803-8106-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
95 | Jin-Hua Hong, Chung-Hung Tsai, Cheng-Wen Wu |
Hierarchical system test by an IEEE 1149.5 MTM-bus slave-module interface core. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 8(5), pp. 503-516, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
82 | Debashis Bhattacharya |
Instruction-Driven Wake-Up Mechanisms for Snoopy TAP Controller. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 17th IEEE VLSI Test Symposium (VTS '99), 25-30 April 1999, San Diego, CA, USA, pp. 467-472, 1999, IEEE Computer Society, 0-7695-0146-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
82 | Jin-Hua Hong, Chung-Hung Tsai, Cheng-Wen Wu |
Hierarchical Testing Using the IEEE Std 1149.5 Module Test and Maintenance Slave Interface Module. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 5th Asian Test Symposium (ATS '96), November 20-22, 1996, Hsinchu, Taiwan, pp. 50-55, 1996, IEEE Computer Society, 0-8186-7478-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
MTM Bus, Boundary Scan, Hierarchical Testing |
77 | Clayton Gibbs |
Backplane Test Bus Applications For IEEE STD 1149.1. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte, NC, USA, pp. 1115-1128, 2003, IEEE Computer Society, 0-7803-8106-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
77 | Bulent I. Dervisoglu, Mike Ricchetti, William Eklow |
Shared I/O-cell structures: a framework for extending the IEEE 1149.1 boundary-scan standard. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1998, Washington, DC, USA, October 18-22, 1998, pp. 980-989, 1998, IEEE Computer Society, 0-7803-5093-6. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
63 | Rakesh N. Joshi, Kenneth L. Williams, Lee Whetsel |
Evolution of IEEE 1149.1 Addressable Shadow Protocol Devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte, NC, USA, pp. 981-987, 2003, IEEE Computer Society, 0-7803-8106-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
63 | Kevin Melocco, Hina Arora, Paul Setlak, Gary Kunselman, Shazia Mardhani |
A Comprehensive Approach to Assessing and Analyzing 1149.1 Test Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte, NC, USA, pp. 358-367, 2003, IEEE Computer Society, 0-7803-8106-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
59 | Chouki Aktouf, Chantal Robach, A. Marinescu, Guy Mazaré |
An Implementation Approach of the IEEE 1149.1 for the Routing Test of a VLSI Massively Parallel Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 12(3), pp. 171-185, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
routing test, IEEE 1149.1, built-in self-test, diagnosis, MIMD architectures |
59 | R. G. Bennetts, A. Osseyran |
IEEE standard 1149.1-1990 on boundary scan: History, literature survey, and current status. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 2(1), pp. 11-25, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
device test, board test, 1149.1, boundary scan |
59 | Colin M. Maunder, Rodham E. Tulloss |
An introduction to the boundary scan standard: ANSI/IEEE Std 1149.1. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 2(1), pp. 27-42, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
ANSI/IEEE Std 1149.1, loaded-board test, self-test, boundary scan, JTAG |
54 | Suzette Vandivier, Mark Wahl, Jeff Rearick |
First IC Validation of IEEE Std. 1149.6. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte, NC, USA, pp. 632-639, 2003, IEEE Computer Society, 0-7803-8106-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
1149.6, test receiver |
50 | Bart Vermeulen, Tom Waayers, Sjaak Bakker |
Multi-TAP Controller Architecture for Digital System Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 19(4), pp. 417-424, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
system-chips, IEEE-1149.1, software-debug, design-for-debug, multi-TAP |
50 | Hardy J. Pottinger, Chien-Yuh Lin |
Using a reconfigurable field programmable gate array to demonstrate boundary scan with built in self test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 5th Great Lakes Symposium on VLSI (GLS-VLSI '95), March 16-18, 1995, The State University of New York at Buffalo, USA, pp. 242-245, 1995, IEEE Computer Society, 0-8186-7035-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
student experiments, educational aids, reconfigurable FPGA, XC4000 Logic Cell Array Family, IEEE Standard 1149.1, XC4003PC84-6, field programmable gate arrays, field programmable gate array, logic testing, built-in self test, built-in self-test, computer science education, integrated circuit testing, design for testability, logic design, BIST, teaching, fault simulation, integrated circuit design, boundary scan, demonstration, boundary scan testing, Xilinx, electronic engineering education |
50 | Don Sterba, Andy Halliday, Don McClean |
ATPG and diagnostics for boards implementing boundary scan. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 2(1), pp. 89-98, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
1149.1, ATPG, diagnostics, boundary scan, JTAG |
50 | Franc Novak, Anton Biasizzo |
Security Extension for IEEE Std 1149.1. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 22(3), pp. 301-303, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
security, test, boundary-scan |
50 | Meng Lu, Yvon Savaria, Bing Qiu 0003, Jacques Taillefer |
IEEE 1149.1 Based Defect and Fault Tolerant Scan Chain for Wafer Scale Integration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2003), 3-5 November 2003, Boston, MA, USA, Proceedings, pp. 18-25, 2003, IEEE Computer Society, 0-7695-2042-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
50 | Dilip K. Bhavsar |
Synchronizing the IEEE 1149.1 Test Access Port for Chip-Level Testability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 17(2), pp. 94-99, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
50 | Debaditya Mukherjee, Melvin A. Breuer |
An IEEE 1149.1 Compliant Test Control Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 13(3), pp. 273-297, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
test control, local test control, distributed test control, dynamic test control, built-in self-test, design-for-test, boundary scan, test bus |
50 | Colin M. Maunder |
A D&T Special Report-Boundary Scan: An End-of-Term Report-IEEE Std 1149.1 Survey Results. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 9(2), pp. 82-85, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
45 | Francisco R. Fernandes, Ricardo J. Machado 0001, José M. Ferreira 0001, Manuel G. Gericota |
Gatewaying IEEE 1149.1 and IEEE 1149.7 test access ports. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 18th IEEE International On-Line Testing Symposium, IOLTS 2012, Sitges, Spain, June 27-29, 2012, pp. 136-137, 2012, IEEE Computer Society, 978-1-4673-2082-5. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
45 | Jose M. M. Ferreira, Manuel G. O. Gericota, Antonio M. Cardoso |
An integrated framework to support remote IEEE 1149.1 / 1149.4 design for test experiments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Online Eng. ![In: Int. J. Online Eng. 2(3), 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP BibTeX RDF |
|
45 | Chauchin Su, Shyh-Jye Jou, Yuan-Tzu Ting |
Decentralized BIST for 1149.1 and 1149.5 Based Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ED&TC ![In: 1996 European Design and Test Conference, ED&TC 1996, Paris, France, March 11-14, 1996, pp. 120-125, 1996, IEEE Computer Society, 0-8186-7423-7. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
41 | Saghir A. Shaikh |
IEEE Std 1149.6 Implementation for a XAUI-to-Serial 10-Gbps Transceiver. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2004 International Test Conference (ITC 2004), October 26-28, 2004, Charlotte, NC, USA, pp. 543-550, 2004, IEEE Computer Society, 0-7803-8581-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
41 | Jeff Rearick, Sylvia Patterson, Krista Dorner |
Integrating Boundary Scan into Multi-GHz I/O Circuitry. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2004 International Test Conference (ITC 2004), October 26-28, 2004, Charlotte, NC, USA, pp. 560-566, 2004, IEEE Computer Society, 0-7803-8581-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
41 | Bill Eklow, Carl Barnhart, Kenneth P. Parker |
IEEE 1149.6: A Boundary-Scan Standard for Advanced Digital Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 20(5), pp. 76-83, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
41 | Stephen K. Sunter, Benoit Nadeau-Dostie |
Complete, Contactless I/O Testing - Reaching the Boundary in Minimizing Digital IC Testing Cost. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2002, Baltimore, MD, USA, October 7-10, 2002, pp. 446-455, 2002, IEEE Computer Society, 0-7803-7543-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
36 | Y. Tsiatouhas, Th. Haniotakis, Angela Arapoyanni |
An Embedded IDDQ Testing Architecture and Technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 4th International Symposium on Quality of Electronic Design (ISQED 2003), 24-26 March 2003, San Jose, CA, USA, pp. 442-445, 2003, IEEE Computer Society, 0-7695-1881-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
IEEE 1149.1, Design for Testability (DFT), Boundary Scan, IDDQ Testing |
36 | Nuno Cardoso, Carlos Beltrán Almeida, José Carlos da Silva 0001 |
A System Level Boundary Scan Controller Board for VME Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 17(3-4), pp. 299-310, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
IEEE 1149.1 boundary scan test, board level test and system level test, ATPG |
36 | Chen-Huan Chiang, Sandeep K. Gupta 0001 |
BIST TPG for SRAM cluster interconnect testing at board level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, pp. 58-65, 2000, IEEE Computer Society, 0-7695-0887-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
SRAM cluster interconnect testing, BIST TPG, static random access memory, board-level interconnects, test pattern generation architecture, IEEE 1149.1 boundary scan architecture, prohibited conditions, testable SRAM cluster interconnect fault detection, logic testing, built-in self test, automatic test pattern generation, test pattern generation, boundary scan testing, integrated circuit interconnections, SRAM chips, printed circuit testing |
36 | Kuen-Jong Lee, Cheng-I Huang |
A hierarchical test control architecture for core based design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, pp. 248-253, 2000, IEEE Computer Society, 0-7695-0887-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
hierarchical test control architecture, SOC design, IEEE P1500 Working Group, test standard, IEEE 1149.1 cores, parallel testing capabilities, hierarchical test control mechanism, deeply embedded cores, hierarchical test access, integrated circuit testing, design for testability, automatic testing, application specific integrated circuits, IEEE standards, test architecture, core based design |
36 | Hong Hao, Kanti Bhabuthmal |
Clock controller design in SuperSPARC II microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1995 International Conference on Computer Design (ICCD '95), VLSI in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings, pp. 124-129, 1995, IEEE Computer Society, 0-8186-7165-3. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
SuperSPARC II, internal clock pulses, internal clock, free running mode, IEEE 1149.1 interface, microprocessor, clocks, microprocessor chips, clock controller |
36 | Nazar S. Haider, Nick Kanopoulos |
Efficient board interconnect testing using the split boundary scan register. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 4(2), pp. 181-189, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
IEEE std. 1149.1-1990, split boundary scan register, BIST, boundary scan |
36 | Subhasish Mitra, Edward J. McCluskey, Samy Makar |
Design for Testability and Testing of IEEE 1149.1 Tap Controller. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 20th IEEE VLSI Test Symposium (VTS 2002), Without Testing It's a Gamble, 28 April - 2 May 2002, Monterey, CA, USA, pp. 247-252, 2002, IEEE Computer Society, 0-7695-1570-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
36 | Dave Stang, Ramaswami Dandapani |
An Implementation of IEEE 1149.1 to Avoid Timing Violations and Other Practical In-Compliance Improvements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2002, Baltimore, MD, USA, October 7-10, 2002, pp. 746-754, 2002, IEEE Computer Society, 0-7803-7543-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
36 | Bart Vermeulen, Tom Waayers, Sjaak Bakker |
EEE 1149.1-Compliant Access Architecture for Multiple Core Debug on Digital System Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2002, Baltimore, MD, USA, October 7-10, 2002, pp. 55-63, 2002, IEEE Computer Society, 0-7803-7543-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
36 | Sungju Park, Taehyung Kim |
A New IEEE 1149.1 Boundary Scan Design for the Detection of Delay Defects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2000 Design, Automation and Test in Europe (DATE 2000), 27-30 March 2000, Paris, France, pp. 458-462, 2000, IEEE Computer Society / ACM, 0-7695-0537-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
36 | Wenyi Feng, Wei-Kang Huang, Fred J. Meyer, Fabrizio Lombardi |
A BIST TPG Approach for Interconnect Testing With the IEEE 1149.1 STD. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 8th Asian Test Symposium (ATS '99), 16-18 November 1999, Shanghai, China, pp. 95-100, 1999, IEEE Computer Society, 0-7695-0315-2. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
36 | Gustavo R. Alves, José Manuel Martins Ferreira |
From Design-for-Test to Design-for-Debug-and-Test: Analysis of Requirements and Limitations for 1149.1. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 17th IEEE VLSI Test Symposium (VTS '99), 25-30 April 1999, San Diego, CA, USA, pp. 473-486, 1999, IEEE Computer Society, 0-7695-0146-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
36 | Najmi T. Jarwala |
Designing "Dual Personality" IEEE 1149.1 Compliant Multi-Chip Modules. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 10(1-2), pp. 77-86, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
module test, design-for-testability, boundary-scan |
36 | Mick Tegethoff, Kenneth P. Parker |
IEEE Std 1149.1: Where Are We? Where From Here? ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 12(2), pp. 53-59, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
27 | Bill Eklow, Ben Bennetts |
New Techniques for Accessing Embedded Instrumentation: IEEE P1687 (IJTAG). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: 11th European Test Symposium, ETS 2006, Southhampton, UK, May 21-24, 2006, pp. 253-254, 2006, IEEE Computer Society, 0-7695-2566-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
27 | Bradford G. Van Treuren, José M. Miranda |
Embedded Boundary Scan. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 20(2), pp. 20-25, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
27 | Tom Waayers |
An improved Test Control Architecture and Test Control Expansion for Core-Based System Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte, NC, USA, pp. 1145-1154, 2003, IEEE Computer Society, 0-7803-8106-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
27 | Bill Eklow, Carl Barnhart, Kenneth P. Parker |
IEEE P1149.6: A Boundary-Scan Standard for Advanced Digital Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2002, Baltimore, MD, USA, October 7-10, 2002, pp. 1056-1065, 2002, IEEE Computer Society, 0-7803-7543-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
27 | Michael Cogswell, Shazia Mardhani, Kevin Melocco, Hina Arora |
A Structured Graphical Tool for Analyzing Boundary Scan Violations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2002, Baltimore, MD, USA, October 7-10, 2002, pp. 755-762, 2002, IEEE Computer Society, 0-7803-7543-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
27 | W. David Ballew, Lauren M. Streb |
Board-level boundary scan: regaining observability with an additional IC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(1), pp. 68-75, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
27 | Kenneth P. Parker, Stig Oresjo |
A language for describing boundary scan devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 2(1), pp. 43-75, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
boundary scan testability, VHDL |
27 | Dilip K. Bhavsar |
Testing Interconnections to Static RAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 8(2), pp. 63-71, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
23 | Kuen-Jong Lee, Jih-Jeen Chen, Cheng-Hua Huang |
Using a single input to support multiple scan chains. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1998, San Jose, CA, USA, November 8-12, 1998, pp. 74-78, 1998, ACM / IEEE Computer Society, 1-58113-008-2. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
boundary scan (IEEE 1149.1) and test compaction, test generation, design for testability, scan based design |
23 | Sebastian Huhn 0001, Stephan Eggersglüß, Krishnendu Chakrabarty, Rolf Drechsler |
Optimization of retargeting for IEEE 1149.1 TAP controllers with embedded compression. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2017, Lausanne, Switzerland, March 27-31, 2017, pp. 578-583, 2017, IEEE, 978-3-9815370-8-6. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
23 | André V. Fidalgo, Andre Couto, Manuel C. Felgueiras, Gustavo R. Alves |
Low cost boundary scan controller for didactic applications (IEEE 1149.1). ![Search on Bibsonomy](Pics/bibsonomy.png) |
exp.at ![In: 2015 3rd Experiment International Conference (exp.at'15), Ponta Delgada, Portugal, June 2-4, 2015, pp. 203-208, 2015, IEEE, 978-1-4673-7717-1. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
23 | Marzieh Mohammadi, Somayeh Sadeghi Kohan, Nasser Masoumi, Zainalabedin Navabi |
An off-line MDSI interconnect BIST incorporated in BS 1149.1. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: 19th IEEE European Test Symposium, ETS 2014, Paderborn, Germany, May 26-30, 2014, pp. 1-2, 2014, IEEE, 978-1-4799-3415-7. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
23 | Somayeh Sadeghi Kohan, Majid Namaki-Shoushtari, Fatemeh Javaheri, Zainalabedin Navabi |
BS 1149.1 extensions for an online interconnect fault detection and recovery. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: 2012 IEEE International Test Conference, ITC 2012, Anaheim, CA, USA, November 5-8, 2012, pp. 1-9, 2012, IEEE Computer Society, 978-1-4673-1594-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
23 | Reza Nourmandi-Pour, Nafiseh Mousavian, Ahmad Khadem-Zadeh |
BIST for network on chip communication infrastructure based on combination of extended IEEE 1149.1 and IEEE 1500 standards. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 42(5), pp. 667-680, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
23 | Tomoaki Konishi, Hiroyuki Yotsuyanagi, Masaki Hashizume |
Supply current testing of open defects at interconnects in 3D Ics with IEEE 1149.1 architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
3DIC ![In: 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31 - February 2, 2012, pp. 1-6, 2011, IEEE, 978-1-4673-2189-1. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
23 | Tsung-Yen Tsai, Gordon W. Roberts |
Programmable phase/frequency generator for system debug and diagnosis using the IEEE 1149.1 test bus. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: 2011 IEEE Custom Integrated Circuits Conference, CICC 2011, San Jose, CA, USA, Sept. 19-21, 2011, pp. 1-4, 2011, IEEE, 978-1-4577-0222-8. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
23 | Reza Nourmandi-Pour, Ahmad Khademzadeh, Amir Masoud Rahmani |
An IEEE 1149.1-based BIST method for at-speed testing of inter-switch links in network on chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 41(7), pp. 417-429, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
23 | Christopher J. Clark |
iMajik: Making 1149.1 TAPs disappear and reappear in SoCs and 3D packages. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 28th IEEE VLSI Test Symposium, VTS 2010, April 19-22, 2010, Santa Cruz, California, USA, pp. 117-122, 2010, IEEE Computer Society, 978-1-4244-6648-1. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
23 | C. J. Clark, Dave Dubberke, Kenneth P. Parker, Bill Tuthill |
Solutions for undetected shorts on IEEE 1149.1 self-monitoring pins. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: 2011 IEEE International Test Conference, ITC 2010, Austin, TX, USA, November 2-4, 2010, pp. 563-570, 2010, IEEE Computer Society, 978-1-4244-7206-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
23 | Dave Bonnett |
IEEE 1149.1- The Internet of Test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATW ![In: 2nd Latin American Test Workshop, LATW 2001, Cancun, Mexico, February 11-14, 2001., pp. 204-208, 2001, IEEE. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP BibTeX RDF |
|
23 | Bulent I. Dervisoglu |
A Unified DFT Architecture for Use with IEEE 1149.1 and VSIA/IEEE P1500 Compliant Test Access Controllers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 38th Design Automation Conference, DAC 2001, Las Vegas, NV, USA, June 18-22, 2001, pp. 53-58, 2001, ACM, 1-58113-297-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
23 | Steven F. Oakland |
Considerations for implementing IEEE 1149.1 on system-on-a-chip integrated circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2000, Atlantic City, NJ, USA, October 2000, pp. 628-637, 2000, IEEE Computer Society, 0-7803-6546-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
23 | Stephen Harrison, Peter Collins, Greg Noeninckx |
The implementation of IEEE Std 1149.1 boundary scan test strategy within a cellular infrastructure production environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2000, Atlantic City, NJ, USA, October 2000, pp. 45-54, 2000, IEEE Computer Society, 0-7803-6546-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
23 | Farideh Golshan |
Test and on-line debug capabilities of IEEE Std 1149.1 in UltraSPARC-III microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2000, Atlantic City, NJ, USA, October 2000, pp. 141-150, 2000, IEEE Computer Society, 0-7803-6546-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
23 | Yuejian Wu, Paul Soong |
Interconnect delay fault testing with IEEE 1149.1. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1999, Atlantic City, NJ, USA, 27-30 September 1999, pp. 449-457, 1999, IEEE Computer Society, 0-7803-5753-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
23 | Gustavo Ribeiro Alves |
Projecto para teste e depuração com base nas arquitecturas 1149.1 e P1149.4 ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
1999 |
RDF |
|
23 | Dilip Bhavsar |
A Method for Synchronizing IEEE 1149.1 Test Access Port for Chip Level Testability Access. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 11th International Conference on VLSI Design (VLSI Design 1991), 4-7 January 1998, Chennai, India, pp. 289-292, 1998, IEEE Computer Society, 0-8186-8224-8. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
23 | Ken Posse |
A Formalization of the IEEE 1149.1-1990 Diagnostic Methodology as Applied to Multichip Modules. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 10(1-2), pp. 119-125, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
fault diagnosis, Boundary-Scan, Multichip Module, MCM, interconnect testing, manufacturing defects |
23 | Lee Whetsel |
An IEEE 1149.1-Based Test Access Architecture for ICs with Embedded Cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1997, Washington, DC, USA, November 3-5, 1997, pp. 69-78, 1997, IEEE Computer Society, 0-7803-4209-7. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
23 | Harbinder Singh, James Beausang, Girish Patankar |
A Symbolic Simulation-Based ANSI/IEEE Std 1149.1 Compliance Checker and BSDL Generator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1997, Washington, DC, USA, November 3-5, 1997, pp. 256-264, 1997, IEEE Computer Society, 0-7803-4209-7. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
23 | Robert J. Russell |
A Method of Extending an 1149.1 Bus for Mixed-Signal Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1996, Test and Design Validity, Washington, DC, USA, October 20-25, 1996, pp. 410-416, 1996, IEEE Computer Society, 0-7803-3541-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
23 | Wuudiann Ke, Duy Le, Najmi T. Jarwala |
A Secure Data Transmission Scheme for 1149.1 Backplane Test Bus. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1995, Driving Down the Cost of Test, Washington, DC, USA, October 21-25, 1995, pp. 789-796, 1995, IEEE Computer Society, 0-7803-2992-9. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
23 | Douglas W. Raymond, D. Eugene Wedge, Philip J. Stringer, Harold W. Ng, Suzanne T. Jennings, Craig T. Pynn, Winsor Soule Jr. |
Algorithmic Extraction of BSDL from 1149.1-compliant Sample ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1995, Driving Down the Cost of Test, Washington, DC, USA, October 21-25, 1995, pp. 561-568, 1995, IEEE Computer Society, 0-7803-2992-9. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
23 | Carol Pyron, William C. Bruce |
Implementing 1149.1 in the PowerPCTM RISC Microprocessor Family. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1995, Driving Down the Cost of Test, Washington, DC, USA, October 21-25, 1995, pp. 844-850, 1995, IEEE Computer Society, 0-7803-2992-9. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
23 | Chouki Aktouf, Chantal Robach, A. Marinescu |
A Routing Testing of a VLSI Massively Parallel Machine Based on IEEE 1149.1. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1995, Driving Down the Cost of Test, Washington, DC, USA, October 21-25, 1995, pp. 781-788, 1995, IEEE Computer Society, 0-7803-2992-9. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
23 | David J. Cheek, Ramaswami Dandapani |
Integration of IEEE Std. 1149.1 and Mixed-Signal Test Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1995, Driving Down the Cost of Test, Washington, DC, USA, October 21-25, 1995, pp. 569-576, 1995, IEEE Computer Society, 0-7803-2992-9. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
23 | John Andrews |
Roadmap for Extending IEEE 1149.1 for Hierarchical Control of Locally-Stored, Standardized-Command-Set Test Programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1994, TEST: The Next 25 Years, Washington, DC, USA, October 2-6, 1994, pp. 300-306, 1994, IEEE Computer Society, 0-7803-2103-0. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
23 | Lee Whetsel |
An Approach to Accelerate Scan Testing in IEEE 1149.1 Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1994, TEST: The Next 25 Years, Washington, DC, USA, October 2-6, 1994, pp. 314-322, 1994, IEEE Computer Society, 0-7803-2103-0. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
23 | Najmi T. Jarwala |
Designing "Dual-Personality" IEEE 1149.1-Compliant Multi-Chip Modules. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1994, TEST: The Next 25 Years, Washington, DC, USA, October 2-6, 1994, pp. 446-455, 1994, IEEE Computer Society, 0-7803-2103-0. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
23 | Alfred L. Crouch, Rick Ramus, Colin M. Maunder |
Low-Power Mode and IEEE 1149.1 Compliance - A Low-Power Solution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1994, TEST: The Next 25 Years, Washington, DC, USA, October 2-6, 1994, pp. 660-669, 1994, IEEE Computer Society, 0-7803-2103-0. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
23 | John Andrews |
Using SCANTM Bridge as an IEEE 1149.1 Protocol Addressable, Multi-Drop, Backplane Test Bus. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1994, TEST: The Next 25 Years, Washington, DC, USA, October 2-6, 1994, pp. 1019, 1994, IEEE Computer Society, 0-7803-2103-0. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
23 | Robert Gage |
1149.1 Scan Control Transport Levels. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1994, TEST: The Next 25 Years, Washington, DC, USA, October 2-6, 1994, pp. 1022, 1994, IEEE Computer Society, 0-7803-2103-0. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
23 | Lee Whetsel |
An IEEE 1149.1 based voltmeter/oscilloscope in a chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 11th IEEE VLSI Test Symposium (VTS'93), 6 Apr 1993-8 Apr 1993, Atlantic City, NJ, USA, pp. 40-46, 1993, IEEE Computer Society, 0-8186-3830-3. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
23 | José Manuel Martins Ferreira, Manuel G. Gericota, José L. Ramalho, Gustavo R. Alves |
BIST for 1149.1-Compatible Boards: A Low-Cost and Maximum-Flexibility Solution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics - Join Them, Baltimore, Maryland, USA, October 17-21, 1993, pp. 536-543, 1993, IEEE Computer Society, 0-7803-1430-1. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
23 | Mick Tegethoff |
IEEE 1149.1: How to Justify Implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics - Join Them, Baltimore, Maryland, USA, October 17-21, 1993, pp. 265, 1993, IEEE Computer Society, 0-7803-1430-1. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP BibTeX RDF |
|
23 | Christopher Poirier |
IEEE P1149.5 to 1149.1 Data and Protocol Conversion. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics - Join Them, Baltimore, Maryland, USA, October 17-21, 1993, pp. 527-535, 1993, IEEE Computer Society, 0-7803-1430-1. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
23 | Wayne T. Daniel |
IEEE 1149.1 Growing Pains. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics - Join Them, Baltimore, Maryland, USA, October 17-21, 1993, pp. 264, 1993, IEEE Computer Society, 0-7803-1430-1. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP BibTeX RDF |
|
23 | Lee Whetsel |
Hierarchically Accessing 1149.1 Applications in a System Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics - Join Them, Baltimore, Maryland, USA, October 17-21, 1993, pp. 517-526, 1993, IEEE Computer Society, 0-7803-1430-1. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
23 | Mark Royals, Tassos Markas, Nick Kanopoulos |
A user programmable macrocell generator for the IEEE 1149.1 boundary scan standard interface port. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microprogramming ![In: Microprocess. Microprogramming 35(1-5), pp. 493-500, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
23 | Robert C. Zak Jr., Jeffrey V. Hill |
An IEEE 1149.1 Compliant Testability Architecture with Internal Scan. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computer & Processors, ICCD '92, Cambridge, MA, USA, October 11-14, 1992, pp. 436-442, 1992, IEEE Computer Society, 0-8186-3110-4. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
23 | Lee Whetsel |
A Proposed Method of Accessing 1149.1 in a Backplane Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1992, Discover the New World of Test and Design, Baltimore, Maryland, USA, September 20-24, 1992, pp. 206-216, 1992, IEEE Computer Society, 0-7803-0760-7. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
23 | John Andrews |
IEEE 1149.1 Applied to Mixed TTL-ECL and Differential Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1992, Discover the New World of Test and Design, Baltimore, Maryland, USA, September 20-24, 1992, pp. 91-95, 1992, IEEE Computer Society, 0-7803-0760-7. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
23 | Barry Caldwell, Tom Langford |
Is IEEE 1149.1 Boundary Scan Cost Effective: A Simple Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1992, Discover the New World of Test and Design, Baltimore, Maryland, USA, September 20-24, 1992, pp. 106-109, 1992, IEEE Computer Society, 0-7803-0760-7. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
23 | William C. Bruce, Michael G. Gallup, Grady Giles, Tom Munns |
Implementing 1149.1 on CMOS Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1992, Discover the New World of Test and Design, Baltimore, Maryland, USA, September 20-24, 1992, pp. 999-1006, 1992, IEEE Computer Society, 0-7803-0760-7. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
23 | Wayne T. Daniel |
Design Verification of a High Density Computer Using IEEE 1149.1. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1992, Discover the New World of Test and Design, Baltimore, Maryland, USA, September 20-24, 1992, pp. 84-90, 1992, IEEE Computer Society, 0-7803-0760-7. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
23 | Steven F. Oakland |
Combining IEEE Standard 1149.1 with reduced-pin-count component test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 9th IEEE VLSI Test Symposium (VTS'91), 15-17 Apr 1991, Atlantic City, NJ, USA, pp. 78-84, 1991, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
23 | Robert Cortez, R. Dandapani, Mike Yeager |
Issues of integrating the IEEE Std 1149.1 into a gate array. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 9th IEEE VLSI Test Symposium (VTS'91), 15-17 Apr 1991, Atlantic City, NJ, USA, pp. 92-97, 1991, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
23 | Lee Whetsel |
An IEEE 1149.1 Based Logic/Signature Analyzer in a Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1991, Test: Faster, Better, Sooner, Nashville, TN, USA, October 26-30, 1991, pp. 869-878, 1991, IEEE Computer Society, 0-8186-9156-5. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
23 | William C. Bruce, Michael G. Gallup, Grady Giles, Tom Munns |
Implementing 1149.1 on CMOS Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1991, Test: Faster, Better, Sooner, Nashville, TN, USA, October 26-30, 1991, pp. 879-886, 1991, IEEE Computer Society, 0-8186-9156-5. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|