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Publication years (Num. hits)
1981-1996 (19) 1997-1998 (19) 1999 (20) 2000 (20) 2001 (27) 2002 (30) 2003 (55) 2004 (44) 2005 (44) 2006 (66) 2007 (79) 2008 (57) 2009 (54) 2010 (50) 2011 (52) 2012 (68) 2013 (74) 2014 (79) 2015 (87) 2016 (67) 2017 (87) 2018 (89) 2019 (78) 2020 (71) 2021 (60) 2022 (74) 2023 (73) 2024 (13)
Publication types (Num. hits)
article(546) book(1) data(1) incollection(2) inproceedings(998) phdthesis(8)
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Found 1569 publication records. Showing 1556 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
107Liqiong Wei, Rongtian Zhang, Kaushik Roy 0001, Zhanping Chen, David B. Janes Vertically integrated SOI circuits for low-power and high-performance applications. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
104Vita Pi-Ho Hu, Yu-Sheng Wu, Ming-Long Fan, Pin Su, Ching-Te Chuang Design and analysis of ultra-thin-body SOI based subthreshold SRAM. Search on Bibsonomy ISLPED The full citation details ... 2009 DBLP  DOI  BibTeX  RDF poisson's equation, subthreshold SRAM, ultra-thin-body, soi, static noise margin
83D. Nadezhin, Sergey Gavrilov, Alexey Glebov, Y. Egorov, Vladimir Zolotov, David T. Blaauw, Rajendran Panda, Murat R. Becer, Alexandre Ardelea, A. Patel SOI Transistor Model for Fast Transient Simulation. Search on Bibsonomy ICCAD The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
83Pin Su, Samel K. H. Fung, Weidong Liu 0002, Chenming Hu Studying the Impact of Gate Tunneling on Dynamic Behaviors of Partially-Depleted SOI CMOS Using BSIMPD. Search on Bibsonomy ISQED The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
81Takafumi Matsumaru, Yuichi Ito, Wataru Saitou The step-on interface (SOI) on a mobile platform: basic functions. Search on Bibsonomy HRI The full citation details ... 2010 DBLP  DOI  BibTeX  RDF friendly-amusing mobile (fam) function, range scanner, step-on interface (soi), human-robot interaction, projector
72Emrah Acar, Peter Feldmann Simulation of SOI transistor circuits through non-equilibrium initial condition analysis (NEICA). Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
72Rouwaida Kanj, Elyse Rosenbaum Critical evaluation of SOI design guidelines. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
69Saibal Mukhopadhyay, Rajiv V. Joshi, Keunwoo Kim, Ching-Te Chuang Variability Analysis for sub-100nm PD/SOI Sense-Amplifier. Search on Bibsonomy ISQED The full citation details ... 2008 DBLP  DOI  BibTeX  RDF PD/SOI, dopant fluctuation, sense amplifier, Variation
69Saibal Mukhopadhyay, Keunwoo Kim, Ching-Te Chuang Design and analysis of Thin-BOX FD/SOI devices for low-power and stable SRAM in sub-50nm technologies. Search on Bibsonomy ISLPED The full citation details ... 2007 DBLP  DOI  BibTeX  RDF FD/SOI, low-power, stability, SRAM
60Michael Fulde, Doris Schmitt-Landsiedel, Gerhard Knoblinger Transient Variations in Emerging SOI Technologies: Modeling and Impact on Analog/Mixed-Signal Circuits. Search on Bibsonomy ISCAS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
60Miriam Adlerstein Marwick, Andreas G. Andreou Retinomorphic system design in three dimensional SOI-CMOS. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
60Olivier Thomas, Amara Amara Ultra low voltage design considerations of SOI SRAM memory cells. Search on Bibsonomy ISCAS (4) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
60Mohammad R. Hoque, T. Ahmad, Todd R. McNutt, H. Alan Mantooth, Mohammad M. Mojarradi Design technique of an on-chip, high-voltage charge pump in SOI. Search on Bibsonomy ISCAS (1) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
60Anurag Chaudhry, M. Jagadesh Kumar Exploring the Novel Characteristics of Fully Depleted Dual-Material Gate (DMG) SOI MOSFET using Two-Dimensional Numerical Simulation Studies. Search on Bibsonomy VLSI Design The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
60Ching-Te Chuang, Rajiv V. Joshi, Ruchir Puri, Keunwoo Kim Design Considerations of Scaled Sub-0.1 ?m PD/SOI CMOS Circuits. Search on Bibsonomy ISQED The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
60Raymond J. Sung, John C. Koob, Tyler L. Brandon, Duncan G. Elliott, Bruce F. Cockburn Design of an Embedded Fully-Depleted SOI SRAM. Search on Bibsonomy MTDT The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
58Riichiro Takemura, Kiyoo Itoh 0001, Tomonori Sekiguchi A 0.5-V FD-SOI twin-cell DRAM with offset-free dynamic-VT sense amplifiers. Search on Bibsonomy ISLPED The full citation details ... 2006 DBLP  DOI  BibTeX  RDF FD-SOI, dynamic-VT sense amplifier, low-voltage RAM, twin-cell DRAM
58Yongduek Seo, Hyunjung Lee, Sang Wook Lee Outlier Removal by Convex Optimization for L-Infinity Approaches. Search on Bibsonomy PSIVT The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
58Rajiv V. Joshi, Kaushik Roy 0001 Design of Deep Sub-Micron CMOS Circuits. Search on Bibsonomy VLSI Design The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
57Eric W. MacDonald, Nur A. Touba Testing domino circuits in SOI technology. Search on Bibsonomy Asian Test Symposium The full citation details ... 2000 DBLP  DOI  BibTeX  RDF silicon-on-insulator, SOI technology, dynamic circuit styles, fault modeling analysis, overall fault coverage, parasitic bipolar leakage, CMOS logic, logic testing, integrated circuit testing, automatic testing, fault simulation, CMOS logic circuits, leakage currents, domino circuits
57Ruchir Puri, Ching-Te Chuang SOI Digital Circuits: Design Issues. Search on Bibsonomy VLSI Design The full citation details ... 2000 DBLP  DOI  BibTeX  RDF Design, Digital Circuits, SOI
56Kiyoo Itoh 0001, Masanao Yamaoka, Takayuki Kawahara Low-voltage limitations of deep-sub-100-nm CMOS LSIs: view of memory designers. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2007 DBLP  DOI  BibTeX  RDF FD-SOI, VT variation, bulk, deep-sub-100-nm CMOS LSIs, minimum VDD, speed variation, leakage, SRAM, DRAM, logic gate
55R. Dean Adams, Phil Shephard III Silicon-on-Insulator Technology Impacts on SRAM Testing. Search on Bibsonomy VTS The full citation details ... 2000 DBLP  DOI  BibTeX  RDF Fault modeling and simulation, Silicon On Insulator (SOI), Memory testing
54John P. Denton, Sang Woo Pae, Gerold W. Neudeck Vertical integration of submicron MOSFETs in two separate layers of SOI islands formed by silicon epitaxial lateral overgrowth. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2001 DBLP  DOI  BibTeX  RDF SOI MOSFET, selective epitaxial growth, silicon, silicon on insulator, thin film SOI, three dimensional circuits
48Rajiv V. Joshi, Rouwaida Kanj, Keunwoo Kim, Richard Q. Williams, Ching-Te Chuang A floating-body dynamic supply boosting technique for low-voltage sram in nanoscale PD/SOI CMOS technologies. Search on Bibsonomy ISLPED The full citation details ... 2007 DBLP  DOI  BibTeX  RDF booster circuit, low power, yield, SRAM
48Asha Balijepalli, Joseph Ervin, Yu Cao 0001, Trevor Thornton Compact Modeling of a PD SOI MESFET for Wide Temperature Designs. Search on Bibsonomy ISQED The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
48Arijit Raychowdhury, Bipul Chandra Paul, Swarup Bhunia, Kaushik Roy 0001 Ultralow power computing with sub-threshold leakage: a comparative study of bulk and SOI technologies. Search on Bibsonomy DATE The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
48Mini Nanua, David T. Blaauw, Chanhee Oh Leakage Current Modeling in PD SOI Circuits. Search on Bibsonomy ISQED The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
48Nele V. T. D'Halleweyn, James Benson, William Redman-White, Ketan Mistry, M. Swanenberg MOOSE: a physically based compact DC model of SOI LD MOSFETs for analogue circuit simulation. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
48Rajiv V. Joshi, K. Kroell, Ching-Te Chuang A Novel Technique For Steady State Analysis For VLSI Circuits In Partially Depleted SOI. Search on Bibsonomy VLSI Design The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
48Erik Säll, Mark Vesterbacka Design of a Comparator in CMOS SOI. Search on Bibsonomy IWSOC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
48Ertan Zencir, Numan Sadi Dogan, Ercument Arvas, Mohammed Ketel A low-power low-noise amplifier in 0.35µm SOI CMOS technology. Search on Bibsonomy ISCAS (1) The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
48Geun Rae Cho, Tom Chen 0001 Comparative Assessment of Adaptive Body-Bias SOI Pass-Transistor Logic. Search on Bibsonomy ISQED The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
48Koushik K. Das, Richard B. Brown Ultra Low-Leakage Power Strategies for Sub-1 V VLSI: Novel Circuit Styles and Design Methodologies for Partially Depleted Silicon-On-Insulator (PD-SOI) CMOS Technology. Search on Bibsonomy VLSI Design The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
48Eric W. MacDonald, Nur A. Touba Very Low Voltage Testing of SOI Integrated Circuits. Search on Bibsonomy VTS The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
48Rajiv V. Joshi, Wei Hwang, S. C. Wilson, Ching-Te Chuang "Cool low power" 1GHz multi-port register file and dynamic latch in 1.8 V, 0.25 mum SOI and bulk technology (poster session). Search on Bibsonomy ISLPED The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
48Rajiv V. Joshi, Wei Hwang, S. C. Wilson, Ghavam V. Shahidi, Ching-Te Chuang A Low Power 900 MHz Register File (8 Ports, 32 Words x 64 Bits) in 1.8V, 0.25µm SOI Technology. Search on Bibsonomy VLSI Design The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
48Sani R. Nassif, Tuyen V. Nguyen SOI technology and tools (abstract). Search on Bibsonomy ICCAD The full citation details ... 1999 DBLP  BibTeX  RDF
48Gwo-Chung Tai, Can E. Korman, Isaak D. Mayergoyz A parallel-in-time method for the transient simulation of SOI devices with drain current overshoots. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
46Takafumi Matsumaru, Yuichi Ito, Wataru Saitou The step-on interface (SOI) on a mobile platform: rehabilitation of the physically challenged. Search on Bibsonomy HRI The full citation details ... 2010 DBLP  DOI  BibTeX  RDF friendly-amusing mobile (fam) function, physically challenged, step-on interface (soi), human-robot interaction, rehabilitation
46Jean-Olivier Plouchart, Jonghae Kim, Hector Recoules, Noah Zamdmer, Yue Tan, Melanie Sherony, Asit Ray, Lawrence F. Wagner A 0.123 mW 7.25 GHz static frequency divider by 8 in a 120-nm SOI technology. Search on Bibsonomy ISLPED The full citation details ... 2003 DBLP  DOI  BibTeX  RDF RF circuit, SOI CMOS, frequency divider, low power, CML
46Jonghae Kim, Jean-Olivier Plouchart, Noah Zamdmer, Melanie Sherony, Yue Tan, Meeyoung Yoon, Robert Trzcinski, Mohamed Talbi, John Safran, Asit Ray, Lawrence F. Wagner A power-optimized widely-tunable 5-GHz monolithic VCO in a digital SOI CMOS technology on high resistivity substrate. Search on Bibsonomy ISLPED The full citation details ... 2003 DBLP  DOI  BibTeX  RDF SOI CMOS, high resistivity substrate, phase NoiseFOM, low power, VCO, RF design
46Amaury Nève, Denis Flandre, Helmut Schettler, Thomas Ludwig 0004, Gerhard Hellner Design of a branch-based 64-bit carry-select adder in 0.18 µm partially depleted SOI CMOS. Search on Bibsonomy ISLPED The full citation details ... 2002 DBLP  DOI  BibTeX  RDF SOI technology, logic design styles, circuit Design
41Amara Amara, Bastien Giraud, Olivier Thomas An Innovative 6T Hybrid SRAM Cell in sub-32 nm Double-Gate MOS Technology. Search on Bibsonomy DELTA The full citation details ... 2010 DBLP  DOI  BibTeX  RDF SRAM cell, Planar Double-Gate (DG), Fully Depleted SOI (FD-SOI), read and write tradeoffs, Ultra Low Voltage (ULV)
37Gautam Kumar Singh, Santosh Kumar Panigrahi A High Frequency PWM Controller in HV Bi-CMOS Process Considering SOI Self-Heating. Search on Bibsonomy ISQED The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
37Jie Deng, Keunwoo Kim, Ching-Te Chuang, H.-S. Philip Wong Device Footprint Scaling for Ultra Thin Body Fully Depleted SOI. Search on Bibsonomy ISQED The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
37Masaaki Iijima, Masayuki Kitamura, Masahiro Numa, Akira Tada, Takashi Ipposhi Ultra Low Voltage Operation with Bootstrap Scheme for Single Power Supply SOI-SRAM. Search on Bibsonomy VLSI Design The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
37Eric W. MacDonald, Nur A. Touba Delay testing of partially depleted silicon-on-insulator (PD-SOI) circuits. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
37Fatemeh Aezinia, Behjat Forouzandeh A Novel Low Power NOR gate in SOI CMOS Technology. Search on Bibsonomy APCCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
37Rajiv V. Joshi, S. S. Kang, N. Zamdmar, Anda Mocuta, Ching-Te Chuang, J. A. Pascual-Gutiérrez Direct Temperature Measurement for VLSI Circuits and 3-D Modeling of Self-Heating in Sub-0.13 mum SOI Technologies. Search on Bibsonomy VLSI Design The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
37Alexandre Valentian, Olivier Thomas, Andrei Vladimirescu, Amara Amara Modeling subthreshold SOI logic for static timing analysis. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
37Ertan Zencir, Ahmet Tekin, Numan Sadi Dogan, Ercument Arvas A low-power DC-7-GHz SOI CMOS distributed amplifier. Search on Bibsonomy ISCAS (1) The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
37Shrirang K. Karandikar, Sachin S. Sapatnekar Technology mapping for SOI domino logic incorporating solutions for the parasitic bipolar effect. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
37Koushik K. Das, Richard B. Brown Novel Circuit Styles for Minimization of Floating Body Effects in Scaled PD-SOI CMOS. Search on Bibsonomy ISVLSI The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
37Salvador Pinillos Gimenez, Marcelo Antonio Pavanello, João Antonio Martino, Stephane Adriaensen, Denis Flandre Design of Operational Transconductance Amplifiers with Improved Gain by Using Graded-Channel SOI nMOSFETs. Search on Bibsonomy SBCCI The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
37Najeeb-ud-Din Hakim, V. Ramgopal Rao, J. Vasi Small Signal Characteristics of Thin Film Single Halo SOI MOSFET for Mixed Mode Applications. Search on Bibsonomy VLSI Design The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
37Geun Rae Cho, Tom Chen 0001 On Single/Dual-Rail Mixed PTL/Static Circuits in Floating-Body SOI and Bulk CMOS: A Comparative Assessment. Search on Bibsonomy VLSI Design The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
37Koichi Nose, Takayasu Sakurai Power-conscious interconnect buffer optimization with improved modeling of driver MOSFET and Its implications to bulk and SOI CMOS technology. Search on Bibsonomy ISLPED The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
37Rouwaida Kanj, Elyse Rosenbaum A critical look at design guidelines for SOI logic gates. Search on Bibsonomy ISCAS (3) The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
37Adrian M. Ionescu, V. Pott, R. Fritschi, Kaustav Banerjee, Michel J. Declercq, Philippe Renaud, C. Hibert, Philippe Flückiger, G. A. Racine Modeling and Design of a Low-Voltage SOI Suspended-Gate MOSFET (SG-MOSFET) with a Metal-over-Gate Architecture. Search on Bibsonomy ISQED The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
37Kenneth L. Shepard, Dae-Jin Kim Body-voltage estimation in digital PD-SOI circuits and itsapplication to static timing analysis. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
37Kenneth L. Shepard CAD Issues for CMOS VLSI Design in SOI. Search on Bibsonomy ISQED The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
37Kenneth L. Shepard, Dae-Jin Kim Body-voltage estimation in digital PD-SOI circuits and its application to static timing analysis. Search on Bibsonomy ICCAD The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
37J. V. Tran, Farnaz Mounes-Toussi, S. N. Storino, D. L. Stasiak SOI Implementation of a 64-Bit Adder. Search on Bibsonomy ICCD The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
35Fernando Silveira, Denis Flandre A 110 nA pacemaker sensing channel in CMOS on silicon-on-insulator. Search on Bibsonomy ISCAS (5) The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
35Joonho Gil, Minkyu Je, Jongho Lee, Hyungcheol Shin A high speed and low power SOL inverter using active body-bias. Search on Bibsonomy ISLPED The full citation details ... 1998 DBLP  DOI  BibTeX  RDF
34Radhakrishnan Sithanandam, Mamidala Jagadesh Kumar A New Hetero-material Stepped Gate (HSG) SOI LDMOS for RF Power Amplifier Applications. Search on Bibsonomy VLSI Design The full citation details ... 2010 DBLP  DOI  BibTeX  RDF LDMOS, breakdown voltage, on-resistance, transconductance, SOI
34Joseph Nayfach-Battilana, Jose Renau SOI, interconnect, package, and mainboard thermal characterization. Search on Bibsonomy ISLPED The full citation details ... 2009 DBLP  DOI  BibTeX  RDF SOI modeling, package modeling, thermal modeling, interconnect modeling
34Koushik K. Das, Rajiv V. Joshi, Ching-Te Chuang, Peter W. Cook, Richard B. Brown New optimal design strategies and analysis of ultra-low leakage circuits for nano-scale SOI technology. Search on Bibsonomy ISLPED The full citation details ... 2003 DBLP  DOI  BibTeX  RDF VLSI, high-performance, leakage-power, circuits, SOI
33Diego Soi, Alessandro Sanna, Davide Maiorca, Giorgio Giacinto Enhancing android malware detection explainability through function call graph APIs. Search on Bibsonomy J. Inf. Secur. Appl. The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
33Soi Ahn, Hyeon-Su Kim, Jae-Young Byon, Hancheol Lim Improving Dust Aerosol Optical Depth (DAOD) Retrieval from the GEOKOMPSAT-2A (GK-2A) Satellite for Daytime and Nighttime Monitoring. Search on Bibsonomy Sensors The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
33Soi Jeon, Hoang Tien Nguyen, Dae-Hyun Choi Safety-Integrated Online Deep Reinforcement Learning for Mobile Energy Storage System Scheduling and Volt/VAR Control in Power Distribution Networks. Search on Bibsonomy IEEE Access The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
33Diego Soi, Davide Maiorca, Giorgio Giacinto, Harel Berger Can you See me? On the Visibility of NOPs against Android Malware Detectors. Search on Bibsonomy CoRR The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
33Shashank Soi, Sushil Kumar Singh 0002, Rajendra Singh, Ashok Kumar C-Band Iris Coupled Cavity Bandpass Filter. Search on Bibsonomy SPCOM The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
33Soi Ahn, Sung-Rae Chung, Hyun-Jong Oh, Chu-Yong Chung Composite Aerosol Optical Depth Mapping over Northeast Asia from GEO-LEO Satellite Observations. Search on Bibsonomy Remote. Sens. The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
33Mehtab Singh, Sahil Nazir Pottoo, Suvidhi, Vivek Soi, Amit Grover, Moustafa H. Aly A high-speed radio over free space optics transmission link under dust environment conditions employing hybrid wavelength- and mode-division multiplexing. Search on Bibsonomy Wirel. Networks The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
33Soi Jeon, Dae-Hyun Choi Optimal Energy Management Framework for Truck-Mounted Mobile Charging Stations Considering Power Distribution System Operating Conditions. Search on Bibsonomy Sensors The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
33Soi Ahn, Joon-Bum Jee, Kyu-Tae Lee, Hyun-Jong Oh Enhanced Accuracy of Airborne Volcanic Ash Detection Using the GEOKOMPSAT-2A Satellite. Search on Bibsonomy Sensors The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
33Rupanshu Soi, Michael Bauer 0001, Sean Treichler, Manolis Papadakis, Wonchan Lee, Patrick S. McCormick, Alex Aiken, Elliott Slaughter Index launches: scalable, flexible representation of parallel task groups. Search on Bibsonomy SC The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
33Rupanshu Soi, Nischay Ram Mamidi, Elliott Slaughter, Kumar Prasun, Anil Nemili, S. M. Deshpande An Implicitly Parallel Meshfree Solver in Regent. Search on Bibsonomy PAW-ATM@SC The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
33Meng Meng, Soi Hoi Lam, Shoujie Li, Yiik Diew Wong Public transit coordination under different strategies between operators. Search on Bibsonomy MT-ITS The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
33Stefano Soi, Florian Daniel, Fabio Casati Conceptual Development of Custom, Domain-Specific Mashup Platforms. Search on Bibsonomy ACM Trans. Web The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
33Stefano Soi, Florian Daniel, Fabio Casati Conceptual Design of Sound, Custom Composition Languages. Search on Bibsonomy Web Services Foundations The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
33Stefano Soi Domain Specific Mashup Platforms as a Service. Search on Bibsonomy 2013   RDF
33Hendrik Gebhardt, Martin Gaedke, Florian Daniel, Stefano Soi, Fabio Casati, Carlos Angel Iglesias, Scott Wilson From Mashups to Telco Mashups: A Survey. Search on Bibsonomy IEEE Internet Comput. The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
33Florian Daniel, Stefano Soi, Stefano Tranquillini, Fabio Casati, Chang Heng, Li Yan Distributed orchestration of user interfaces. Search on Bibsonomy Inf. Syst. The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
33Fabio Casati, Florian Daniel, Antonella De Angeli, Muhammad Imran 0002, Stefano Soi, Chritopher R. Wilkinson, Maurizio Marchese Developing Mashup Tools for End-Users: On the Importance of the Application Domain. Search on Bibsonomy Int. J. Next Gener. Comput. The full citation details ... 2012 DBLP  BibTeX  RDF
33Muhammad Imran 0002, Felix Kling, Stefano Soi, Florian Daniel, Fabio Casati, Maurizio Marchese ResEval mash: a mashup tool for advanced research evaluation. Search on Bibsonomy WWW (Companion Volume) The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
33Florian Daniel, Muhammad Imran 0002, Felix Kling, Stefano Soi, Fabio Casati, Maurizio Marchese Developing domain-specific mashup tools for end users. Search on Bibsonomy WWW (Companion Volume) The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
33Muhammad Imran 0002, Stefano Soi, Felix Kling, Florian Daniel, Fabio Casati, Maurizio Marchese On the Systematic Development of Domain-Specific Mashup Tools for End Users. Search on Bibsonomy ICWE The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
33Johannes Tulusan, Lito Soi, Johannes Paefgen, Marc Brogle, Thorsten Staake Eco-efficient feedback technologies: Which eco-feedback types prefer drivers most? Search on Bibsonomy WOWMOM The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
33Scott Wilson, Florian Daniel, Uwe Jugel, Stefano Soi Orchestrated User Interface Mashups Using W3C Widgets. Search on Bibsonomy ICWE Workshops The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
33Florian Daniel, Stefano Soi, Fabio Casati Distributed User Interface Orchestration: On the Composition of Multi-User (Search) Applications. Search on Bibsonomy SeCO Workshop The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
33Florian Daniel, Stefano Soi, Stefano Tranquillini, Fabio Casati, Heng Chang, Yan Li MarcoFlow: Modeling, Deploying, and Running Distributed User Interface Orchestrations. Search on Bibsonomy BPM (Demos) The full citation details ... 2010 DBLP  BibTeX  RDF
33Florian Daniel, Stefano Soi, Stefano Tranquillini, Fabio Casati, Chang Heng, Li Yan From People to Services to UI: Distributed Orchestration of User Interfaces. Search on Bibsonomy BPM The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
33Soi Luong, Samuel Chong Personalised Ambient Intelligence in Buildings Via Context-Aware Agents. Search on Bibsonomy ICISO The full citation details ... 2010 DBLP  BibTeX  RDF
33Stefano Soi, Marcos Báez Domain-Specific Mashups: From All to All You Need. Search on Bibsonomy ICWE Workshops The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
33Shane T. Jensen, Sameer Soi, Li-San Wang A Bayesian approach to efficient differential allocation for resampling-based significance testing. Search on Bibsonomy BMC Bioinform. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
33Florian Daniel, Fabio Casati, Stefano Soi, Jonny Fox, David Zancarli, Ming-Chien Shan Hosted Universal Integration on the Web: The mashArt Platform. Search on Bibsonomy ICSOC/ServiceWave The full citation details ... 2009 DBLP  DOI  BibTeX  RDF Hosted Universal Integration, Services Composition, Mashups
33Florian Daniel, Stefano Soi, Fabio Casati From Mashup Technologies to Universal Integration: Search Computing the Imperative Way. Search on Bibsonomy SeCO Workshop The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
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