Search results for "semiconductor"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
76	Christophe Lécuyer, David C. Brock	Biographies.	IEEE Ann. Hist. Comput.	2006	DBLP DOI BibTeX RDF	Gordon Moore, semiconductor industry, silicon technology, silicon device manufacture, Fairchild Semiconductor, Shockley Semiconductor, microprocessor, integrated circuit, DRAM, personal computer, chemistry, Moore's law, Intel
65	Jay Vleeschhouwer, Warren East, Michael J. Fister, Aart J. de Geus, Walden C. Rhines, Jackson Hu, Rick Cassidy	Differentiate and deliver: leveraging your partners.	DAC	2005	DBLP DOI BibTeX RDF	EDS, semiconductor fabrication, supplier-customer relationships, intellectual property, processors
57	Boris Troyanovsky, Zhiping Yu, Lydia So, Robert W. Dutton	Relaxation-based harmonic balance technique for semiconductor device simulation.	ICCAD	1995	DBLP DOI BibTeX RDF	semiconductor device simulation, nonlinear relaxation, PISCES, RF amplifiers, harmonic distortion, intermodulation distortion, microwave semiconductor devices, nonlinear frequency-domain simulation, Harmonic balance
48	Giovanni Stracquadanio, Concetta Drago, Vittorio Romano, Giuseppe Nicosia	Multi-objective optimization of doping profile in semiconductor design.	GECCO	2010	DBLP DOI BibTeX RDF	semiconductor design, multi-objective optimization, electronic design automation
46	Fumio Suzuki, Hisao Koizumi, M. Hiramine, K. Yamamoto, Hiroto Yasuura, K. Okino	A HW/SW co-design environment for multi-media equipments development using inverse problem.	CODES	1997	DBLP DOI BibTeX RDF	audio circuitry, conceptual stage, development cycle reduction, hardware/software codesign environment, human recognition characteristics, human sensibilities, multimedia equipment development, netlist generation, repeated results comparison, semiconductor circuits, semiconductor production, signal reproduction, system response, television receiver, evaluation, perception, multimedia communication, inverse problem, cost estimates, performance estimates, optimization method, filter design, numerical models, susceptibility, playback
46	Chen-Fu Chien, Yun-Ju Chen, Jin-Tang Peng	Demand forecast of semiconductor products based on technology diffusion.	WSC	2008	DBLP DOI BibTeX RDF
41	Dug Hee Moon, Kyeong Wook Shin, Chul Soon Park, Dong Soo Kim	A manufacturing system simulation of semiconductor packaging substrate.	SpringSim	2009	DBLP BibTeX RDF	lead frame, manufacturing system design, packaging substrate, discrete event simulation, semiconductor
41	Zheng-Cai Cao, Fei Qiao, Qidi Wu	Ga based approach for optimized scheduling in a semiconductor wafer fabrication.	GEC Summit	2009	DBLP DOI BibTeX RDF	semiconductor wafer fabrication, genetic algorithm, scheduling
41	Malcolm Yoke Hean Low, Kong Wei Lye, Peter Lendermann, Stephen John Turner, Reman Tat Wee Chim, Surya Hadisaputra Leo	An agent-based approach for managing symbiotic simulation of semiconductor assembly and test operation.	AAMAS Industrial Applications	2005	DBLP DOI BibTeX RDF	agent-supported simulation, symbiotic simulation, semiconductor manufacturing
41	Paul B. Chou, A. Ravishankar Rao, Martin C. Sturzenbecker, Frederick Y. Wu, Virginia H. Brecher	Automatic defect classification for semiconductor manufacturing.	Mach. Vis. Appl.	1997	DBLP DOI BibTeX RDF	Classification, Machine vision, Process control, Defects, Semiconductor manufacturing
39	Vincenza Carchiolo, Sebastiano D'Ambra, Alessandro Longheu, Michele Malgeri	Issues in object orienting the ST Microelectronics manufacturing model.	APSEC	2000	DBLP DOI BibTeX RDF	semiconductor device manufacture, ST Microelectronics manufacturing model, structured production model, semiconductor device manufacturing, production flow, finite state machines, finite state machine, inheritance, inheritance, object-oriented methods, manufacturing systems, computer integrated manufacturing, object-oriented approach
39	Horng-Ren Tsai, Toly Chen	Self-adaptive Agent-Based Dynamic Scheduling for a Semiconductor Manufacturing Factory.	SAB	2008	DBLP DOI BibTeX RDF
39	Yiming Li 0005, Cheng-Kai Chen	A Distributed Simulation-Based Computational Intelligence Algorithm for Nanoscale Semiconductor Device Inverse Problem.	ISPA Workshops	2006	DBLP DOI BibTeX RDF
39	MuDer Jeng, Xiaolan Xie, Sheng-Luen Chung	ERCN* merged nets for modeling degraded behavior and parallel processes in semiconductor manufacturing systems.	IEEE Trans. Syst. Man Cybern. Part A	2004	DBLP DOI BibTeX RDF
39	Brian Donnellan	Knowledge Management in the Semiconductor Industry: Dispatches from the Front Line.	PAKM	2004	DBLP DOI BibTeX RDF	Knowledge Management, Innovation, Knowledge Management Systems, New Product Development
39	T. Manago	Spin Detection and Injection Using Ferromagnetic Metal and Semiconductor Hybrid Structure.	ICMENS	2003	DBLP DOI BibTeX RDF
39	Santanu Das	Trends in Communication Technology and its Impact on Semiconductor.	VLSI Design	2000	DBLP DOI BibTeX RDF
37	Huy Nguyen Anh Pham, Arthur M. D. Shr, Peter P. Chen	An Integer Linear Programming Approach for Dedicated Machine Constraint.	ACIS-ICIS	2008	DBLP DOI BibTeX RDF	Dedicated Machine Constraint, Photolithography, Integer Linear Programming, Semiconductor Manufacturing
37	Robert Madge	New test paradigms for yield and manufacturability.	IEEE Des. Test Comput.	2005	DBLP DOI BibTeX RDF	nanometer-era semiconductor, test paradigm, yield and manufacturability
37	Chih-Wea Wang, Kuo-Liang Cheng, Jih-Nung Lee, Yung-Fa Chou, Chih-Tsun Huang, Cheng-Wen Wu, Frank Huang, Hong-Tzer Yang	Fault Pattern Oriented Defect Diagnosis for Memories.	ITC	2003	DBLP DOI BibTeX RDF	failure analysis (FA), fault pattern, memory diagnostics, memory testing, bitmap, semiconductor memory
36	Chin Soon Chong, Appa Iyer Sivakumar, Robert K. L. Gay	Semiconductor manufacturing: design, development and application of an object oriented simulation toolkit for real-time semiconductor manufacturing scheduling.	WSC	2002	DBLP DOI BibTeX RDF
36	Chad D. DeJong, Seth A. Fischbein	Semiconductor manufacturing material handling systems: integrating dynamic fab capacity and automation models for 300mm semiconductor manufacturing.	WSC	2000	DBLP DOI BibTeX RDF
35	Serge N. Demidenko, Victor Lai	Industry-Academia Collaboration in Undergraduate Test Engineering Unit Development.	DELTA	2006	DBLP DOI BibTeX RDF
34	Xinliang Zhang, Jing Xu, Jianji Dong, Dexiu Huang	All-Optical Logic Gates Based on Semiconductor Optical Amplifiers and Tunable Filters.	OSC	2009	DBLP DOI BibTeX RDF	all-optical logic gates, semiconductor optical amplifiers (SOAs), delay interferometer, bandpass filter
34	YuanLin Wen, Sheng-Luen Chung, Li-Der Jeng, MuDer Jeng	Intelligent Design of Diagnosable Systems: A Case Study of Semiconductor Manufacturing Machines.	KES (2)	2007	DBLP DOI BibTeX RDF	Petri Nets, Fault diagnosis, Semiconductor Manufacturing
34	Shu-Hsing Chung, I-Ping Chung, Amy Hsin-I Lee	Collaborative Production-Distribution Planning for Semiconductor Production Turnkey Service.	ICCSA (1)	2007	DBLP DOI BibTeX RDF	SPTS, TPP, Network Transformation, Semiconductor Manufacturing
34	Maria Spyropoulou, Konstantinos Yiannopoulos, Stelios Sygletos, Kyriakos Vlachos, Ioannis Tomkos	160 Gbps Simulation of a Quantum Dot Semiconductor Optical Amplifier Based Optical Buffer.	ONDM	2007	DBLP DOI BibTeX RDF	Quantum Dot Semiconductor Optical Amplifiers, Programmable Delays, Optical packet switching, Optical buffers, Wavelength Converters
34	N. G. Shankar, Z. W. Zhong	Improved segmentation of semiconductor defects using area sieves.	Mach. Vis. Appl.	2006	DBLP DOI BibTeX RDF	Area sieve, Discrete wavelet transform, Machine vision, Inspection, Semiconductor
34	Josep Prat, Cristina Arellano, Victor Polo 0001, Carlos Bock	Optical Network Unit Based on a Bidirectional Reflective Semiconductor Optical Amplifier.	OpNeTec	2004	DBLP DOI BibTeX RDF	Fiber-to-the-home, Optical modulation, Optical signal detection, Reflective semiconductor optical amplifier, Access networks
34	Jin-Fu Li 0001, Jen-Chieh Yeh, Rei-Fu Huang, Cheng-Wen Wu, Peir-Yuan Tsai, Archer Hsu, Eugene Chow	A Built-In Self-Repair Scheme for Semiconductor Memories with 2-D Redundancy.	ITC	2003	DBLP DOI BibTeX RDF	built-in redundancy-analysis, built-in self-test, memory testing, semiconductor memory, built-in self-repair
32	Jonathan P. Bowen, Tim Bergin, Christopher H. Sterling	Reviews.	IEEE Ann. Hist. Comput.	2006	DBLP DOI BibTeX RDF	Halley's Comet, Work Projects Administration, time line, origins of the Internet, Silicon Valley, General Electric, Litton Industries, Shockley Semiconductor, Fairchild Semiconductor, human computers
32	G. Hari Rama Krishna, Amit K. Aditya, Nirmal B. Chakrabarti, Swapna Banerjee	Analysis of temperature dependence of Si-Ge HBT.	VLSI Design	1995	DBLP DOI BibTeX RDF	semiconductor materials, heterojunction bipolar transistors, Ge-Si alloys, heterojunction bipolar transistors, Ge mole-fraction, two dimensional device simulator, BISOF, current gain, graded HBT, 200 to 300 K, simulation, finite element method, finite element analysis, FEM, temperature dependence, SiGe, thermal analysis, semiconductor device models
32	Glenn Healey, Raghava Kondepudy	Radiometric CCD camera calibration and noise estimation.	IEEE Trans. Pattern Anal. Mach. Intell.	1994	DBLP DOI BibTeX RDF	semiconductor device noise, radiometric CCD camera calibration, primary cue, material reflectance, digitized pixel values, sensor noise, scene variation, camera characterization, fixed pattern nonuniformity, spatial variation, dark current, computer vision, edge detection, edge detection, reflectivity, parameter estimation, calibration, shape from shading, video cameras, video cameras, scene description, visual processes, CCD image sensors, noise estimation, semiconductor device models, radiometry
32	Jiancheng Guan, Nan Ma	A bibliometric study of China's semiconductor literature compared with other major asian countries.	Scientometrics	2007	DBLP DOI BibTeX RDF
32	Yaw-Jen Chang, Yuan Kang, Chin-Liang Hsu, Chi-Tim Chang, Tat Yan Chan	Virtual Metrology Technique for Semiconductor Manufacturing.	IJCNN	2006	DBLP DOI BibTeX RDF
32	Clemens Heitzinger, Alireza Sheikholeslami, Jong Mun Park, Siegfried Selberherr	A method for generating structurally aligned grids for semiconductor device simulation.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2005	DBLP DOI BibTeX RDF
32	José A. Ramírez-Hernández, Heshan Li, Emmanuel Fernandez, Charles R. McLean, Swee Leong	A framework for standard modular simulation in semiconductor wafer fabrication systems.	WSC	2005	DBLP DOI BibTeX RDF
32	Hideki Hasegawa, Seiya Kasai	III-V Compound Semiconductor Nanotechnology for Smart Systems.	ICMENS	2005	DBLP DOI BibTeX RDF
32	Dimitrios Ntalaperas, K. Theodoropoulos, Athanasios K. Tsakalidis, Nikos Konofaos	A Quantum Computer Architecture Based on Semiconductor Recombination Statistics.	Panhellenic Conference on Informatics	2005	DBLP DOI BibTeX RDF
32	Li Li 0008, Fei Qiao, Hua Jiang, Qidi Wu	The research on dispatching rule for improving on-time delivery for semiconductor wafer fab.	ICARCV	2004	DBLP DOI BibTeX RDF
32	Ming-Yueh Tsay, Hong Xu, Chia-wen Wu	Author co-citation analysis of semiconductor literature.	Scientometrics	2003	DBLP DOI BibTeX RDF
32	Ming-Yueh Tsay, Hong Xu, Chia-wen Wu	Journal co-citation analysis of semiconductor literature.	Scientometrics	2003	DBLP DOI BibTeX RDF
32	Shan-Ping Chin, Ching-Yuan Wu	A new grid-generation method for 2-D simulation of devices with nonplanar semiconductor surface.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1993	DBLP DOI BibTeX RDF
32	Mark R. Simpson	PRIDE: an integrated design environment for semiconductor device simulation.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1991	DBLP DOI BibTeX RDF
30		Inventions: A Result of Risk-Taking, Diversity, and Holistic Thinking - An interview with Bernard S. Meyerson, IBM Fellow, Vice President, and Chief Technologist of IBM's System Technology Group.	IEEE Des. Test Comput.	2005	DBLP DOI BibTeX RDF	silicon germanium, semiconductor
30	Phil Nigh, Wayne M. Needham, Kenneth M. Butler, Peter C. Maxwell, Robert C. Aitken	An experimental study comparing the relative effectiveness of functional, scan, IDDq and delay-fault testing.	VTS	1997	DBLP DOI BibTeX RDF	semiconductor testing, stuck-fault testing, ASIC device, application specific integrated circuits, functional testing, IDDQ testing, delay-fault testing, scan testing
29	Amit K. Gupta II, Appa Iyer Sivakumar	Semiconductor manufacturing: simulation based multiobjective schedule optimization in semiconductor manufacturing.	WSC	2002	DBLP DOI BibTeX RDF
29	Scott J. Mason, John W. Fowler	Semiconductor manufacturing scheduling: maximizing delivery performance in semiconductor wafer fabrication facilities.	WSC	2000	DBLP DOI BibTeX RDF
28	Seung Soo Han, Dong Sun Seo, Sang Jeen Hong	Modeling and Characterization of Plasma Processes Using Modular Neural Network.	ISNN (2)	2006	DBLP DOI BibTeX RDF
28	Jae Won Lee, Sung Hwa Jung, Sung Chang Park, Young Joong Lee, Young Chul Jang	System based SQA and implementation of SPI for successful projects.	IRI	2005	DBLP DOI BibTeX RDF
27	David A. Laws	A Company of Legend: The Legacy of Fairchild Semiconductor.	IEEE Ann. Hist. Comput.	2010	DBLP DOI BibTeX RDF	Fairchild, Hoerni, Moore, Noyce, Silicon Valley, integrated circuit, Planar, Microelectronics, Semiconductor
27	Gerhard Klimeck, Mathieu Luisier	Atomistic Modeling of Realistically Extended Semiconductor Devices with NEMO and OMEN.	Comput. Sci. Eng.	2010	DBLP DOI BibTeX RDF	atomistic modeling and simulation, nanoscale semiconductor devices, parallel computing, computer-aided design, high-performance computing, nanotechnology, Nanoelectronics
27	Kais A. Al-Naimee, Sora F. Abdalah, Marzena Ciszak, Riccardo Meucci, Fortunato Tito Arecchi, Francesco Marino	Incomplete Homoclinic Scenarios in Semiconductor Devices with Optoelectronic Feedback: Generation and Synchronization.	COMPENG	2010	DBLP DOI BibTeX RDF	Homoclinic chaos, semiconductor devices
27	Shu-Hsing Chung, I. P. Chung, Y. T. Tai, Y. M. Chu	The Design of Outsourcing Planning for Semiconductor Backend Turnkey Service.	NCM (2)	2008	DBLP DOI BibTeX RDF	Semiconductor backend turnkey service (SBTS), wafer fabrication, outsourcing
27	Richard J. Blaikie, Maan M. Alkaisi, Steven M. Durbin, David R. S. Cumming	Teaching Integrated Circuit and Semiconductor Device Design in New Zealand: The University of Canterbury Approach.	DELTA	2002	DBLP DOI BibTeX RDF	Semiconductor Devices, Education, Integrated Circuit
27	Mike Gardner, Jack Bieker	Data mining solves tough semiconductor manufacturing problems.	KDD	2000	DBLP DOI BibTeX RDF	manufacturing optimization, semiconductor yield enhancement, data mining, neural networks, machine learning, pattern recognition, self organizing maps, rule induction
27	R. K. Coomer, Ivan G. Graham	Massively Parallel Methods for Semiconductor Device Modelling.	Computing	1996	DBLP DOI BibTeX RDF	Semiconductor device, drift-diffusion equations, Gummel's method, domain decomposition massively parallel, finite element methods, Schur complement, preconditioned conjugate gradient methods
27	Pinaki Mazumder, Janak H. Patel	Parallel Testing for Pattern-Sensitive Faults in Semiconductor Random-Access Memories.	IEEE Trans. Computers	1989	DBLP DOI BibTeX RDF	semiconductor random-access memories, design-for-testability approach, MOS integrated circuits, reliability, integrated circuit testing, linear complexity, MOS, random-access storage, integrated memory circuits, pattern-sensitive faults, design strategy, parallel testing
27	Carl-Erik W. Sundberg	Erasure and Error Decoding for Semiconductor Memories.	IEEE Trans. Computers	1978	DBLP DOI BibTeX RDF	Erasure and error decoding, erasure correcting code, error correcting code, fault-tolerant system, Hamming code, semiconductor memory
25	Antun Domic	Design or manufacturing: which will be best for the future of the semiconductor roadmap?	ISPD	2008	DBLP DOI BibTeX RDF
25	I-Hsuan Hong, Hsi-Mei Hsu, Yi-Mu Wu, Chun-Shao Yeh	Pricing decision and lead time setting in a duopoly semiconductor industry.	WSC	2008	DBLP DOI BibTeX RDF
25	Horst Zisgen, Ingo Meents, Benjamin R. Wheeler, Thomas Hanschke	A queueing network based system to model capacity and cycle time for semiconductor fabrication.	WSC	2008	DBLP DOI BibTeX RDF
25	Chen-Fu Chien, Wen-Chih Chen, Shao-Chung Hsu	An indirect workforce (re)allocation model for semiconductor manufacturing.	WSC	2008	DBLP DOI BibTeX RDF
25	Andreas Klemmt, Sven Horn, Gerald Weigert, Thomas Hielscher	Simulations-based and solver-based optimization approaches for batch processes in semiconductor manufacturing.	WSC	2008	DBLP DOI BibTeX RDF
25	Appa Iyer Sivakumar, Chao Qi, Andy Darwin Kasan Hidayat	Experimental study on variations of WIPLOAD Control in semiconductor wafer fabrication environment.	WSC	2008	DBLP DOI BibTeX RDF
25	An-Guo Chao, S. T. Tseng, David Shan-Hill Wong, Shi-Shang Jang, Shui-Pin Lee	Systematic applications of multivariate analysis to monitoring of equipment health in semiconductor manufacturing.	WSC	2008	DBLP DOI BibTeX RDF
25	Chen-Fu Chien, Stéphane Dauzère-Pérès, Hans Ehm, John W. Fowler, Zhibin Jiang, Shekar Krishnaswamy, Lars Mönch, Reha Uzsoy	Modeling and analysis of semiconductor manufacturing in a shrinking world: Challenges and successes.	WSC	2008	DBLP DOI BibTeX RDF
25	Carl Johnzen, Philippe Vialletelle, Stéphane Dauzère-Pérès, Claude Yugma, Alexandre Derreumaux	Impact of qualification management on scheduling in semiconductor manufacturing.	WSC	2008	DBLP DOI BibTeX RDF
25	Michael M. Mielke, Gerard A. Alphonse, Peter J. Delfyett	Multiwavelength modelocked semiconductor lasers for photonic access network applications.	IEEE J. Sel. Areas Commun.	2007	DBLP DOI BibTeX RDF
25	Toly Chen	A Fuzzy-Neural Approach with BPN Post-classification for Job Completion Time Prediction in a Semiconductor Fabrication Plant.	Analysis and Design of Intelligent Systems using Soft Computing Techniques	2007	DBLP DOI BibTeX RDF
25	Gary W. Godding, Hessam S. Sarjoughian, Karl G. Kempf	Application of combined discrete-event simulation and optimization models in semiconductor enterprise manufacturing systems.	WSC	2007	DBLP DOI BibTeX RDF
25	Huai Zhang, Zhibin Jiang, Chengtao Guo	Simulation based real-time scheduling method for dispatching and rework control of semiconductor manufacturing system.	SMC	2007	DBLP DOI BibTeX RDF
25	Oh-Hyun Kwon	Perspective of the Future Semiconductor Industry: Challenges and Solutions.	DAC	2007	DBLP BibTeX RDF
25	Zhongjie Wang, Xinhua Jiang, Qidi Wu	Modeling and Real-Time Scheduling of Semiconductor Manufacturing Line Based on Simulation.	LSMS (1)	2007	DBLP DOI BibTeX RDF
25	W. Wessner, Johann Cervenka, Clemens Heitzinger, Andreas Hössinger, Siegfried Selberherr	Anisotropic Mesh Refinement for the Simulation of Three-Dimensional Semiconductor Manufacturing Processes.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2006	DBLP DOI BibTeX RDF
25	Sebastian Werner, Sven Horn, Gerald Weigert, Thomas Jähnig	Simulation based scheduling system in a semiconductor backend facility.	WSC	2006	DBLP DOI BibTeX RDF
25	Kilian Schmidt, Jörg Weigang, Oliver Rose	Modeling semiconductor tools for small lotsize FAB simulations.	WSC	2006	DBLP DOI BibTeX RDF
25	Pei-Chann Chang, Yen-Wen Wang, Chen-Hao Liu	Combining SOM and GA-CBR for Flow Time Prediction in Semiconductor Manufacturing Factory.	RSCTC	2006	DBLP DOI BibTeX RDF	Flow time prediction, Genetic Algorithms, Self-Organizing Map, Case-Based Reasoning
25	Eric Liau, Doris Schmitt-Landsiedel	Computational Intelligence Characterization Method of Semiconductor Device.	DATE	2005	DBLP DOI BibTeX RDF
25	Hessam S. Sarjoughian, Dongping Huang, Gary W. Godding, Karl G. Kempf, Wenlin Wang, Daniel E. Rivera, Hans D. Mittelmann	Hybrid discrete event simulation with model predictive control for semiconductor supply-chain manufacturing.	WSC	2005	DBLP DOI BibTeX RDF
25	Vikram Ramamurthi, Michael E. Kuhl, Karl D. Hirschman	Analysis of production control methods for semiconductor research and development fabs using simulation.	WSC	2005	DBLP DOI BibTeX RDF
25	Olaf Schenk, Stefan Röllin, Anshul Gupta	The effects of unsymmetric matrix permutations and scalings in semiconductor device and circuit simulation.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2004	DBLP DOI BibTeX RDF
25	Jiang Hua, Li Li 0008, Fei Qiao, Qidi Wu	The new method of dynamic scheduling in semiconductor fabrication line.	ICARCV	2004	DBLP DOI BibTeX RDF
25	Huang Dan, Yan Juanwei, Qiao Fei	Modeling with hierarchical Petri net of semiconductor manufacturing system.	ICARCV	2004	DBLP DOI BibTeX RDF
25	Vyacheslav A. Trofimov, Maria M. Loginova	Comparison of Some Difference Schemes for Problem of Femtosecond Pulse Interaction with Semiconductor in the Case of Nonlinear Mobility Coefficient.	NAA	2004	DBLP DOI BibTeX RDF
25	Hermann Gold	Dynamic optimization of routing in a Semiconductor Manufacturing Plant.	OR	2004	DBLP DOI BibTeX RDF
25	Krishna V. Palem	Energy Aware Algorithm Design via Probabilistic Computing: From Algorithms and Models to Moore?s Law and Novel (Semiconductor) Devices.	HiPC	2003	DBLP DOI BibTeX RDF
25	Kazuo Miyashita, Kazuyuki Senoh, Hiroyuki Ozaki, Hirofumi Matsuo	Factory scheduling and dispatching: constant time interval production planning with application to WIP control in semiconductor fabrication.	WSC	2003	DBLP DOI BibTeX RDF
25	Nirmal Govind, David Fronckowiak	Process equipment modeling: resident-entity based simulation of batch chamber tools in 300mm semiconductor manufacturing.	WSC	2003	DBLP DOI BibTeX RDF
25	Lars Mönch, Marcel Stehli	An Ontology for Production Control of Semiconductor Manufacturing Processes.	MATES	2003	DBLP DOI BibTeX RDF
25	Hyun Song Jang, Young Joong Lee, Young Jun Han, Chung Sam Ahn, Joong Min Choi	Enhanced Approaches of Content Management for the Collaborative Semiconductor Business.	CW	2003	DBLP DOI BibTeX RDF
25	William Liu, Tay Jin Chua, J. Larn, Feng-Yu Wang, Tian Xiang Cai, Xiao-Feng Yin	APS, ERP and MES systems integration for semiconductor backend assembly.	ICARCV	2002	DBLP DOI BibTeX RDF
25	Gaofeng Wang, Xiaoning Qi, Zhiping Yu, Robert W. Dutton	Accurate Model of Metal-Insulator-Semiconductor Interconnects.	ISQED	2002	DBLP DOI BibTeX RDF
25	Daniel N. Maynard	Productivity Optimization Techniques for the Proactive Semiconductor Manufacturer (invited).	ISQED	2002	DBLP DOI BibTeX RDF	Modeling, Productivity, Design for Manufacturing (DFM), Characterization, Checking
25	Ganesan Umanesan, Eiji Fujiwara	A Class of Random Multiple Bits in a Byte Error Correcting (S t/b EC)Codes for Semiconductor Memory Systems.	PRDC	2002	DBLP DOI BibTeX RDF
25	Scott L. Rosen, Chad A. Geist, Daniel A. Finke, Jyotirmaya Nanda, Russell R. Barton	Graphical methods for robust design of a semiconductor burn-in process.	WSC	2001	DBLP DOI BibTeX RDF
25	Shari Murray, Gerald T. Mackulak, John W. Fowler, Theron Colvin	A simulation-based cost modeling methodology for evaluation of interbay material handling in a semiconductor wafer fab.	WSC	2000	DBLP DOI BibTeX RDF
25	Appa Iyer Sivakumar	Simulation based cause and effect analysis of cycle time distribution in semiconductor backend.	WSC	2000	DBLP DOI BibTeX RDF
25	Igor Paprotny, Juin-Yan Shiau, Yo Huh, Gerald T. Mackulak	Material handling: simulation based comparison of semiconductor AMHS alternatives: Continuous Flow vs. Overhead Monorail.	WSC	2000	DBLP DOI BibTeX RDF
25	Theo A. C. M. Claasen	The Changing Semiconductor Industry: From Components to Silicon Systems.	EUROMICRO	1999	DBLP DOI BibTeX RDF