Search results for "delay"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
19	Gregg N. Hoyer, Gin Yee, Carl Sechen	Locally clocked pipelines and dynamic logic.	IEEE Trans. Very Large Scale Integr. Syst.	2002	DBLP DOI BibTeX RDF
19	Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki	Maple-opt: a performance-oriented simultaneous technology mapping, placement, and global routing algorithm for FPGAs.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1998	DBLP DOI BibTeX RDF
19	Manjit Borah, Robert Michael Owens, Mary Jane Irwin	Recent Developments in Performance Driven Steiner Routing: An Overview.	Great Lakes Symposium on VLSI	1996	DBLP DOI BibTeX RDF
19	Hannah Honghua Yang, D. F. Wong 0001	Edge-map: optimal performance driven technology mapping for iterative LUT based FPGA designs.	ICCAD	1994	DBLP DOI BibTeX RDF
19	A. Khanna, John A. Zinky	The Revised ARPANET Routing Metric.	SIGCOMM	1989	DBLP DOI BibTeX RDF	ARPANET
18	Tommaso Rizzo, József Stéger, Péter Pollner, István Csabai, Gábor Vattay	High quality queueing information from accelerated active network tomography.	TRIDENTCOM	2008	DBLP DOI BibTeX RDF	oneway delay measurement, queueing delay tomography
18	Wafa Berrayana, Ryad Ben-El-Kezadri, Farouk Kamoun, Guy Pujolle	DelayEDD-HCCA and RT-HCCA: two new IEEE 802.11 e schemes based HCCA supporting real-time applications.	MobiMedia	2006	DBLP DOI BibTeX RDF	delay EDD, simulation, QoS, real-time applications, IEEE 802.11e, delay bound, HCCA
18	Sameer Goel, Rubin A. Parekhji	Choosing the Right Mix of At-speed Structural Test Patterns: Comparisons in Pattern Volume Reduction and Fault Detection Efficiency.	Asian Test Symposium	2005	DBLP DOI BibTeX RDF	delay fault simulation, N-detect coverage metrics, Delay fault test, test optimizations
18	Muhammad Nummer, Manoj Sachdev	Testing high-performance pipelined circuits with slow-speed testers.	ACM Trans. Design Autom. Electr. Syst.	2003	DBLP DOI BibTeX RDF	high-performance testing, Delay-fault testing, design for delay testability
18	Jason Cong, Lei He 0001, Cheng-Kok Koh, David Zhigang Pan	Global interconnect sizing and spacing with consideration of coupling capacitance.	ICCAD	1997	DBLP DOI BibTeX RDF	GISS solutions, asymmetric wire sizing, delay reduction, fringing capacitances, global interconnect sizing and spacing, global wire sizing, interconnect delay minimization, multiple nets, optimal wire sizing, spacing solution, symmetric effective fringing properties, VLSI, coupling capacitance
18	Tianxiong Xue, Ernest S. Kuh	Post routing performance optimization via multi-link insertion and non-uniform wiresizing.	ICCAD	1995	DBLP DOI BibTeX RDF	post routing performance optimization, link insertion and wiresizing, delay skew, routing area, delay
18	S. Krishnakumar, P. Suresh, S. Sadashiva Rao, M. P. Pareek, R. Gupta	A single chip, pipelined, cascadable, multichannel, signal processor.	VLSI Design	1995	DBLP DOI BibTeX RDF	delay lines, single chip signal processor, cascadable processor, multichannel signal processor, programmable delay line, memory mapped peripheral, online diagnostics, shadow accumulators, double metal CMOS process, 144 pin CPGA, VLSI, timing, pipeline processing, digital signal processing chips, pipelined processor, CMOS digital integrated circuits, array multipliers, DSP architecture, 2 micron
18	Tahir Nawaz Minhas, Markus Fiedler, Patrik Arlos	Quantification of packet delay variation through the coefficient of throughput variation.	IWCMC	2010	DBLP DOI BibTeX RDF	coefficient of throughput variation, network measurement traffice shapping, packet delay variation, traffic shaper, performance analysis, throughput
18	Jin-Tai Yan, Zhi-Wei Chen	Resource-constrained timing-driven link insertion for critical delay reduction.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	critical delay, link insertion, non-tree
18	Emre Salman, Eby G. Friedman	Methodology to achieve higher tolerance to delay variations in synchronous circuits.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	delay uncertainty, environmental variation, robust circuit, process variation, tolerance
18	Fotis N. Koumboulis, Nikolaos D. Kouvakas, Paraskevas N. Paraskevopoulos	Dynamic disturbance rejection controllers for neutral time delay systems with application to a central heating system.	Sci. China Ser. F Inf. Sci.	2009	DBLP DOI BibTeX RDF	neutral time delay, disturbance rejection, measurable disturbances, central heating, linearization
18	Wei Gao 0006, Qinghua Li, Bo Zhao 0009, Guohong Cao	Multicasting in delay tolerant networks: a social network perspective.	MobiHoc	2009	DBLP DOI BibTeX RDF	community, social network, multicast, delay tolerant network, centrality
18	Huimin Xiao	Stability of Hopfield Neural Networks with Time-Varying Delay.	ISNN (1)	2009	DBLP DOI BibTeX RDF	neural networks, Stability, time-delay, Lyapunov functions
18	Valentina Martina, Michele Garetto, Emilio Leonardi	Delay-throughput performance in mobile ad-hoc networks with heterogeneous nodes.	MSWiM	2009	DBLP DOI BibTeX RDF	delay-throughput trade-offs, scaling laws
18	Eun Cheol Kim, Jin Young Kim 0001	Performance Evaluation of PN Code Acquisition with Delay Diversity Receiver for TH-UWB System.	ICCSA (2)	2009	DBLP DOI BibTeX RDF	Delay diversity receiver, equal gain combining (EGC), mean acquisition time, pseudo-noise (PN) code acquisition, time hopping-ultra wideband (TH-UWB) system
18	N. Pete Sedcole, Peter Y. K. Cheung	Parametric Yield Modeling and Simulations of FPGA Circuits Considering Within-Die Delay Variations.	ACM Trans. Reconfigurable Technol. Syst.	2008	DBLP DOI BibTeX RDF	statistical theory, within-die variability, modeling, FPGA, Delay, reconfiguration, process variation, yield
18	S. V. Narasimhan, Nandini Basumallick, Ratana Chaitanya	Improved phase estimation based on complete bispectrum and modified group delay.	Signal Image Video Process.	2008	DBLP DOI BibTeX RDF	Bispectrum, Modified group delay, Non-minimum phase system identification, Phase estimation
18	Stefan Tillich, Martin Feldhofer, Thomas Popp, Johann Großschädl	Area, Delay, and Power Characteristics of Standard-Cell Implementations of the AES S-Box.	J. Signal Process. Syst.	2008	DBLP DOI BibTeX RDF	substitution box (S-box), inversion in the finite field GF($28$), standard cell implementation, Advanced Encryption Standard (AES), power consumption, silicon area, critical path delay
18	Najet Boughanmi, Yeqiong Song	A New Routing Metric for Satisfying Both Energy and Delay Constraints in Wireless Sensor Networks.	J. Signal Process. Syst.	2008	DBLP DOI BibTeX RDF	delivery rate, wireless sensor network, routing, real-time, delay, energy, lifetime
18	Houman Homayoun, Sudeep Pasricha, Mohammad A. Makhzan, Alexander V. Veidenbaum	Improving performance and reducing energy-delay with adaptive resource resizing for out-of-order embedded processors.	LCTES	2008	DBLP DOI BibTeX RDF	energy-delay, out-of-order embedded processor, resource resizing, performance, architecture
18	Marcus Brenner, Armin Zimmermann	Analysis of Delay Time Distributions in Multistage Interconnection Networks Considering Multicast Traffic.	NCA	2008	DBLP DOI BibTeX RDF	Quality of Service, performance analysis, multicasting, Multistage interconnection networks, delay distributions
18	Jyh-Horng Wen, Hsi-Chou Hsu	Adaptive Filter for Delay Line Combination (DLC) Receivers.	CNSR	2008	DBLP DOI BibTeX RDF	impulse radio (IR), delay line combination (DLC) receivers, ultra-wideband (UWB)
18	Antonios Skordylis, Niki Trigoni	Delay-bounded routing in vehicular ad-hoc networks.	MobiHoc	2008	DBLP DOI BibTeX RDF	minimum cost forwarding, routing, ad hoc network, delay, VANET, vehicular network, inter-vehicle communication
18	György Dán, Viktória Fodor	Delay Bounds and Scalability for Overlay Multicast.	Networking	2008	DBLP DOI BibTeX RDF	Scalability, Delay, Overlay multicast, Large-deviation theory
18	Mirco Musolesi, Cecilia Mascolo	A framework for multi-region delay tolerant networking.	Wireless Networks and Systems for Developing Regions	2008	DBLP DOI BibTeX RDF	communication paradigms, multi-region protocols, persistent caching, push/pull architecture, delay tolerant networking, data replication
18	Joris Walraevens, Dieter Fiems, Herwig Bruneel	Analysis of the Transient Delay in a Discrete-Time Buffer with Batch Arrivals.	ITNG	2008	DBLP DOI BibTeX RDF	delay characteristics, performance, Queueing theory, generating functions
18	Geng Ji 0002	Disturbance Attenuating Controller Design for a Class of Nonlinear Systems with Unknown Time-Delay.	ISNN (1)	2008	DBLP DOI BibTeX RDF	Disturbance attenuation, input-to-state practically stable, adaptive neural network control, nonlinear time-delay systems
18	Zhi-Ting Lin, Yugui Qu, Qing-Hua Wang, Baohua Zhao	E-Scheme in Delay-Tolerant Networks.	APNOMS	2008	DBLP DOI BibTeX RDF	E-Scheme, routing approach, Delay-Tolerant Network
18	Sankar Gurumurthy, Ramtilak Vemu, Jacob A. Abraham, Suriyaprakash Natarajan	On efficient generation of instruction sequences to test for delay defects in a processor.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	native-mode self-test, delay test, software based self-test
18	DiaaEldin Khalil, Yehea I. Ismail, Muhammad M. Khellah, Tanay Karnik, Vivek De	Analytical Model for the Propagation Delay of Through Silicon Vias.	ISQED	2008	DBLP DOI BibTeX RDF	3D integrated circuits, propagation delay model, dimensional analysis, TSV
18	Vishal J. Mehta, Malgorzata Marek-Sadowska, Kun-Han Tsai, Janusz Rajski	Timing-Aware Multiple-Delay-Fault Diagnosis.	ISQED	2008	DBLP DOI BibTeX RDF	defect-diagnosis, diagnosis, ATPG, DFT, delay-testing
18	Hidetoshi Kobayashi, Kazumasa Takami	Algorithm for Selecting either an Overlay or Flat Route Based on the Amount of the Delay Measurement Load on the Home Agent in a Hierarchical Mobile IPv6 Network.	NEW2AN	2008	DBLP DOI BibTeX RDF	Packet delay, Route Selection, Hierarchical Mobile IPv6
18	Igor Keller, King Ho Tam, Vinod Kariat	Challenges in gate level modeling for delay and SI at 65nm and below.	DAC	2008	DBLP DOI BibTeX RDF	delay calculation, gate characterization, gate modeling
18	Wanqing Tu, Cormac J. Sreenan, Weijia Jia 0001	Worst-Case Delay Control in Multigroup Overlay Networks.	IEEE Trans. Parallel Distributed Syst.	2007	DBLP DOI BibTeX RDF	Worst-case delay control, multiple groups, overlay multicast, traffic control
18	Hiroki Arimura, Takeaki Uno	An efficient polynomial space and polynomial delay algorithm for enumeration of maximal motifs in a sequence.	J. Comb. Optim.	2007	DBLP DOI BibTeX RDF	Maximal motif, Data mining, Algorithm, Delay, Polynomial time, Pattern discovery, Enumeration, Motif, Sequence mining, Closed pattern, Closed itemset
18	Cong Liu 0001, Jie Wu 0001	Scalable routing in delay tolerant networks.	MobiHoc	2007	DBLP DOI BibTeX RDF	motion cycle, simulation, scalability, delay tolerant networks (DTNs), contact, hierarchical routing, delivery
18	Kazuyoshi Murata, Megumi Nakamura, Yu Shibuya, Itaru Kuramoto, Yoshihiro Tsujino	Visual Feedback to Reduce the Negative Effects of Message Transfer Delay on Voice Chatting.	HCI (9)	2007	DBLP DOI BibTeX RDF	Message Transfer Delay, Unintentional Interruption, Status Monitor, Voice Chatting
18	N. Pete Sedcole, Peter Y. K. Cheung	Parametric yield in FPGAs due to within-die delay variations: a quantitative analysis.	FPGA	2007	DBLP DOI BibTeX RDF	statistical theory, within-die variability, modelling, FPGA, delay, reconfiguration, process variation, yield
18	Jun-Zhao Sun	Query optimization based on user-specified delay item for wireless sensor networks.	IWCMC	2007	DBLP DOI BibTeX RDF	sensor networks, delay, query optimization
18	Hamidou Tembine, Eitan Altman, Rachid El Azouzi	Asymmetric delay in evolutionary games.	VALUETOOLS	2007	DBLP DOI BibTeX RDF	hawk and dove game, multiple access game, delay differential equation, replicator dynamics, evolutionary stable strategy
18	Paolo Bernardi, Michelangelo Grosso, Matteo Sonza Reorda	Hardware-accelerated path-delay fault grading of functional test programs for processor-based systems.	ACM Great Lakes Symposium on VLSI	2007	DBLP DOI BibTeX RDF	fault-emulation, software-based testing, FPGA, path-delay
18	Daniel A. Vivanco, Anura P. Jayasumana	A Measurement-Based Modeling Approach for Network-Induced Packet Delay.	LCN	2007	DBLP DOI BibTeX RDF	Inter-packet gaps, Delay, Internet Measurments
18	Stephen Farrell, Vinny Cahill, Dermot Geraghty, Ivor Humphreys, Paul McDonald	When TCP Breaks: Delay- and Disruption- Tolerant Networking.	IEEE Internet Comput.	2006	DBLP DOI BibTeX RDF	TCP, delay-tolerant networking, disruption-tolerant networking
18	Mihaela van der Schaar, Yiannis Andreopoulos, Zhiping Hu	Optimized Scalable Video Streaming over IEEE 802.11a/e HCCA Wireless Networks under Delay Constraints.	IEEE Trans. Mob. Comput.	2006	DBLP DOI BibTeX RDF	IEEE 802.11e WLANs, delay-constrained video streaming, QoS-enabled MAC scheduling, token rate adaptation, cross-layer optimization, link adaptation
18	José Niño-Mora	Marginal productivity index policies for scheduling a multiclass delay-/loss-sensitive queue.	Queueing Syst. Theory Appl.	2006	DBLP DOI BibTeX RDF	Multiclass queue, Multi-queue switch, Delay-sensitive, Loss-sensitive, Restless bandits, Work-cost analysis, Index policies, Bias optimality, Scheduling, Conservation laws, Finite buffers
18	Zhizhong Zhang, Fang Cheng, Jiangtao Luo, Qijian Mao, Jun Wang, Shaofeng Qiu	Preemptive and non-preemptive scheduling of optical switches with configuration delay.	Sci. China Ser. F Inf. Sci.	2006	DBLP DOI BibTeX RDF	configuration delay, scheduling, optical switches
18	Bipul C. Paul, Kaushik Roy 0001	Impact of Body Bias on Delay Fault Testing of Sub-100 nm CMOS Circuits.	J. Electron. Test.	2006	DBLP DOI BibTeX RDF	adaptive body bias design, statistical analysis, process variation, delay fault testing
18	Hafizur Rahaman 0001, Debesh K. Das, Bhargab B. Bhattacharya	Implementing Symmetric Functions with Hierarchical Modules for Stuck-At and Path-Delay Fault Testability.	J. Electron. Test.	2006	DBLP DOI BibTeX RDF	universal tests, stuck-at fault, path-delay fault, synthesis-for-testability, unate function, symmetric boolean function
18	Yassine Boujelben, André Girard, Jean-Charles Grégoire	A Sequential Algorithm for Constructing Delay-Constrained Multirings for Multipoint-to-Multipoint Communications.	Telecommun. Syst.	2006	DBLP DOI BibTeX RDF	Multipoint-to-multipoint, Stability, Delay bounds, Multiring, Lagrangean relaxation
18	József Sziray	Test Calculation for Logic and Delay Faults in Digital Circuits.	MTV	2006	DBLP DOI BibTeX RDF	Test-pattern calculation, logic faults, CMOS transistor structures, functional testing, delay faults, multi-valued logic
18	Olivier Dousse, Christina Tavoularis, Patrick Thiran	Delay of intrusion detection in wireless sensor networks.	MobiHoc	2006	DBLP DOI BibTeX RDF	sensor networks, intrusion detection, delay, percolation
18	Xunqi Yu, James W. Modestino, Dian Fan	Evaluation of the residual packet-loss rate using packet-level FEC for delay-constrained media network transport.	MobiMedia	2006	DBLP DOI BibTeX RDF	delay-constrained media, packet-level FEC, residual packet-loss rate, autoregressive model
18	Shao Liu, Tamer Basar, R. Srikant 0001	TCP-Illinois: a loss and delay-based congestion control algorithm for high-speed networks.	VALUETOOLS	2006	DBLP DOI BibTeX RDF	NewReno, stability, congestion control, TCP, fairness, throughput, packet loss, AIMD, SACK, queueing delay, Reno
18	Feng Shi 0010, Yiorgos Makris	Testing delay faults in asynchronous handshake circuits.	ICCAD	2006	DBLP DOI BibTeX RDF	test generation, asynchronous circuits, delay faults, handshake circuits
18	Dianlin Du, Chongguang Wu, Xionglin Luo, Xin Zuo	Delay Time Identification and Dynamic Characteristics Study on ANN Soft Sensor.	ISDA (1)	2006	DBLP DOI BibTeX RDF	artificial neural network, dynamic system, delay time, soft sensor
18	Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino	Dynamic thermal clock skew compensation using tunable delay buffers.	ISLPED	2006	DBLP DOI BibTeX RDF	temperature aware design methodology, tunable delay buffers, clock skew, clock tree
18	Adit D. Singh, Gefu Xu	Output Hazard-Free Transition Tests for Silicon Calibrated Scan Based Delay Testing.	VTS	2006	DBLP DOI BibTeX RDF	Hazard-Free, Test, Delay, Transition
18	Levent Aksoy, Eduardo A. C. da Costa, Paulo F. Flores, José Monteiro 0001	Optimization of area under a delay constraint in digital filter synthesis using SAT-based integer linear programming.	DAC	2006	DBLP DOI BibTeX RDF	multiple constant multiplication, multiplierless digital filter design, delay optimization, area optimization
18	Joonhwan Yi, John P. Hayes	The Coupling Model for Function and Delay Faults.	J. Electron. Test.	2005	DBLP DOI BibTeX RDF	test generation, fault modeling, delay faults, functional faults
18	Wei Zheng 0009, Sheng Zhang 0004, Yi Ouyang 0001, Fillia Makedon, James Ford	Node clustering based on link delay in P2P networks.	SAC	2005	DBLP DOI BibTeX RDF	link delay, node clustering, peer-to-peer, hierarchical clustering
18	Laura Sánchez-Miquel, Natalia Vesselinova-Vassileva, Francisco Barceló 0001, Patricia Carbajo-Flores	Energy and delay-constrained routing in mobile ad hoc networks: an initial approach.	PE-WASUN	2005	DBLP DOI BibTeX RDF	ad hoc networks, energy efficiency, delay, routing protocols
18	Eduardo Parente Ribeiro, Victor C. M. Leung	Asymmetric path delay optimization in mobile multi-homed SCTP multimedia transport.	WMuNeP	2005	DBLP DOI BibTeX RDF	asymmetric path, multimedia, delay, mobile network, SCTP, multi-homing
18	Vasilis F. Pavlidis, Eby G. Friedman	Interconnect delay minimization through interlayer via placement in 3-D ICs.	ACM Great Lakes Symposium on VLSI	2005	DBLP DOI BibTeX RDF	RC interconnects, elmore delay, 3-D ICs
18	Haihua Yan, Gefu Xu, Adit D. Singh	Low Voltage Test in Place of Fast Clock in DDSI Delay Test.	ISQED	2005	DBLP DOI BibTeX RDF	delay test, defect, ATE, low voltage test
18	Paal Engelstad, Olav N. Østerbø	Delay and Throughput Analysis of IEEE 802.11e EDCA with Starvation Prediction.	LCN	2005	DBLP DOI BibTeX RDF	Z-transform of the Delay, Virtual Collision, Performance Analysis, EDCA, Starvation, Non-Saturation, AIFS
18	Nick G. Duffield, Francesco Lo Presti	Network tomography from measured end-to-end delay covariance.	IEEE/ACM Trans. Netw.	2004	DBLP DOI BibTeX RDF	multicast, statistical inference, packet delay, topology discovery, end-to-end measurement
18	Ahmed M. Mahdy, Jitender S. Deogun, Shashank K. Mehta	End-to-End Delay Heuristics for Adaptive Optical Wireless Networks.	MASCOTS	2004	DBLP DOI BibTeX RDF	Optical Wireless Networks, Link Flexibility, NP-Hardness, Spanning Trees, Transmission Delay
18	Ho Fai Ko, Nicola Nicolici	Functional Scan Chain Design at RTL for Skewed-Load Delay Fault Testing.	Asian Test Symposium	2004	DBLP DOI BibTeX RDF	High-level DFT, Delay-fault testing
18	Samuli Aalto, Urtzi Ayesta, Eeva Nyberg-Oksanen	Two-level processor-sharing scheduling disciplines: mean delay analysis.	SIGMETRICS	2004	DBLP DOI BibTeX RDF	FB, MLPS, unfinished truncated work, scheduling, M/G/1, LAS, PS, mean delay
18	Robert S. Allison, James E. Zacher, David W. L. Wang, Joseph Shu	Effects of network delay on a collaborative motor task with telehaptic and televisual feedback.	VRCAI	2004	DBLP DOI BibTeX RDF	virtual environments, haptics, delay, collaborative virtual environments, teleoperation
18	Ramyanshu Datta, Antony Sebastine, Ashwin Raghunathan, Jacob A. Abraham	On-chip delay measurement for silicon debug.	ACM Great Lakes Symposium on VLSI	2004	DBLP DOI BibTeX RDF	design for testability, delay fault testing, silicon debug
18	Yarallah Koolivand, Ali Zahabi, Nasser Masoumi	Modeling of polysilicide gate resistance effect on inverter delay and power consumption using distributed RC method and branching technique.	ACM Great Lakes Symposium on VLSI	2004	DBLP DOI BibTeX RDF	polysilicide gate resistance, short circuit power, performance degradation, propagation delay
18	S.-H. Gary Chan, Fouad A. Tobagi	Modeling and Dimensioning Hierarchical Storage Systems for Low-Delay Video Services.	IEEE Trans. Computers	2003	DBLP DOI BibTeX RDF	Hierarchical storage systems, tertiary and secondary levels, staging and replacement policies, user delay goal, distributed storage systems, video services
18	Miron Abramovici, Charles E. Stroud	BIST-Based Delay-Fault Testing in FPGAs.	J. Electron. Test.	2003	DBLP DOI BibTeX RDF	Field Programmable Gate Arrays, Built-In Self-Test, delay faults
18	Chao-Yang Yeh, Malgorzata Marek-Sadowska	Delay budgeting in sequential circuit with application on FPGA placement.	DAC	2003	DBLP DOI BibTeX RDF	delay budgeting, FPGA, placement, sequential circuits
18	Koen Engelborghs, Tatyana Luzyanina, Dirk Roose	Numerical bifurcation analysis of delay differential equations using DDE-BIFTOOL.	ACM Trans. Math. Softw.	2002	DBLP DOI BibTeX RDF	numerical stability and bifurcation analysis, Continuation, software package, delay differential equations
18	Chor Ping Low, Xueyan Song	On Finding Feasible Solutions for the Delay Constrained Group Multicast Routing Problem.	IEEE Trans. Computers	2002	DBLP DOI BibTeX RDF	Delay constrained group multicast routing, feasible solutions, NP-completeness, heuristic algorithm
18	Lauren Hui Chen, Malgorzata Marek-Sadowska	Efficient Closed-Form Crosstalk Delay Metrics.	ISQED	2002	DBLP DOI BibTeX RDF	interconnect coupling, coupling direction, delay, crosstalk
18	Hiroshi Saito, Alex Kondratyev, Takashi Nanya	Design of Asynchronous Controllers with Delay Insensitive Interface.	ASP-DAC/VLSI Design	2002	DBLP DOI BibTeX RDF	delay insensitive interface, gate-level transformation, behavioral transformation, asynchronous circuits, hazards
18	Boris S. Mordukhovich, Ruth Trubnik	Stability of Discrete Approximations and Necessary Optimality Conditions for Delay-Differential Inclusions.	Ann. Oper. Res.	2001	DBLP DOI BibTeX RDF	delay-differential inclusions, finite-difference perturbations, generalized differentiation, stability, dynamic optimization, variational analysis, necessary optimality conditions
18	Ramesh C. Tekumalla, Premachandran R. Menon	On Redundant Path Delay Faults in Synchronous Sequential Circuits.	IEEE Trans. Computers	2000	DBLP DOI BibTeX RDF	functional sensitizability, sequential circuits, testability, Path delay faults, redundant faults
18	Jacob Savir	Distributed BIST Architecture to Combat Delay Faults.	J. Electron. Test.	2000	DBLP DOI BibTeX RDF	BIST, LFSR, delay test, MISR, LSSD, SRL
18	Andrzej Krasniewski	Self-Testing of FPGA Delay Faults in the System Environment.	IOLTW	2000	DBLP DOI BibTeX RDF	FPGA, BIST, random testing, delay faults
18	Satoshi Fujita, Tadanori Nakagawa	Lower Bounding Techniques for the Multiprocessor Scheduling Problem with Communication Delay.	IEEE PACT	1999	DBLP DOI BibTeX RDF	inevitable communication delay, lower bound, Multiprocessor scheduling problem
18	Jacob Savir	Design for Testability to Combat Delay Faults.	ICCD	1999	DBLP DOI BibTeX RDF	BIST, LFSR, Delay Test, MISR, LSSD, SRL
18	Jean Michel Daga, E. Ottaviano, Daniel Auvergne	Temperature Effect on Delay for Low Voltage Applications.	DATE	1998	DBLP DOI BibTeX RDF	temperature effect, derating, Low power, delay, Low voltage
18	Yoshio Kameda, Stanislav Polonsky, Masaaki Maezawa, Takashi Nanya	Primitive-Level Pipelining Method on Delay-Insensitive Model for RSFQ Pulse-Driven Logic.	ASYNC	1998	DBLP DOI BibTeX RDF	pulse-driven logic, Josephson junction device, RSFQ device, pipeline, asynchronous circuit, delay-insensitive circuit
18	Debesh K. Das, Indrajit Chaudhuri, Bhargab B. Bhattacharya	Design of an Optimal Test Pattern Generator for Built-in Self Testing of Path Delay Faults.	VLSI Design	1998	DBLP DOI BibTeX RDF	Built-in self-test, TPG, delay faults, robust testing, two-pattern tests
18	Ada Wai-Chee Fu	Delay-Optimal Quorum Consensus for Distributed Systems.	IEEE Trans. Parallel Distributed Syst.	1997	DBLP DOI BibTeX RDF	replicated database systems, distributed systems, network topology, Mutual exclusion, wide-area networks, communication delay, coteries, quorum consensus
18	Wangning Long, Shiyuan Yang, Zhongcheng Li, Yinghua Min	Memory Efficient ATPG for Path Delay Faults.	Asian Test Symposium	1997	DBLP DOI BibTeX RDF	Delay Testing, Automatic Test Generation, IC Testing, Path Sensitization
18	S. Crepaux-Motte, Mireille Jacomino, Rene David	An algebraic method for delay fault testing.	VTS	1996	DBLP DOI BibTeX RDF	input values, output function, robustly testable fault, nonrobustly testable fault, weakly verifiable, fault diagnosis, logic testing, delays, timing, Markov processes, random testing, delay fault testing, state transition, input vectors, algebraic method
18	Imtiaz P. Shaik, Michael L. Bushnell	Circuit design for low overhead delay-fault BIST using constrained quadratic 0-1 programming .	VTS	1995	DBLP DOI BibTeX RDF	low overhead delay-fault BIST, constrained quadratic 0-1 programming, built-in self testing model, weighted signed graph balancing problem, VLSI, logic testing, delays, built-in self test, integrated circuit testing, logic design, automatic testing, integrated circuit design, quadratic programming, circuit design, digital integrated circuits, hazards and race conditions
18	Imtiaz P. Shaik, Michael L. Bushnell	A graph approach to DFT hardware placement for robust delay fault BIST.	VLSI Design	1995	DBLP DOI BibTeX RDF	graph heuristic, DFT hardware placement, robust delay fault BIST, ULSI circuit, built-in self-testing model, design for testability hardware, hazard free structure, graph theory, logic testing, delays, built-in self test, integrated circuit testing, design for testability, fault location, digital integrated circuits, ULSI
18	Soumitra Bose, Prathima Agrawal, Vishwani D. Agrawal	The optimistic update theorem for path delay testing in sequential circuits.	J. Electron. Test.	1993	DBLP DOI BibTeX RDF	test generation, Fault simulation, timing analysis, path delay faults
17	Haixia Wu, Wei Zhang, Wei Feng 0012, Jun Peng	Delay-dependent stability for static recurrent neural networks via a piecewise delay approach.	IEEE ICCI	2009	DBLP DOI BibTeX RDF