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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 2239 occurrences of 940 keywords
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Results
Found 7472 publication records. Showing 7472 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
18 | Yan Lin 0001, Fei Li 0003, Lei He 0001 |
Routing track duplication with fine-grained power-gating for FPGA interconnect power reduction. |
ASP-DAC |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Yi-Ting Chiang, Da-Wei Wang 0004, Churn-Jung Liau, Tsan-sheng Hsu |
Secrecy of Two-Party Secure Computation. |
DBSec |
2005 |
DBLP DOI BibTeX RDF |
Privacy Analysis, Scalar Product, Private Computation |
18 | Jason Cong, Ashok Jagannathan, Glenn Reinman, Yuval Tamir |
Understanding the energy efficiency of SMT and CMP with multiclustering. |
ISLPED |
2005 |
DBLP DOI BibTeX RDF |
energy efficiency, simultaneous multithreading, chip multiprocessing |
18 | Johnsy K. John, Jie S. Hu, Sotirios G. Ziavras |
Optimizing the Thermal Behavior of Subarrayed Data Caches. |
ICCD |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Kiyotaka Imai, Yasushi Yamagata, Sadaaki Masuoka, Naohiko Kimuzuka, Yuri Yasuda, Mitsuhiro Togo, Masahiro Ikeda, Yasutaka Nakashiba |
Device technology for body biasing scheme. |
ISCAS (1) |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Aditya Bansal, Kaushik Roy 0001 |
Asymmetric halo CMOSFET to reduce static power dissipation with improved performance. |
ISCAS (1) |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Ozcan Ozturk 0001, Mahmut T. Kandemir |
Energy management in software-controlled multi-level memory hierarchies. |
ACM Great Lakes Symposium on VLSI |
2005 |
DBLP DOI BibTeX RDF |
software-managed memory, embedded systems |
18 | Rahul M. Rao, Kanak Agarwal, Anirudh Devgan, Kevin J. Nowka, Dennis Sylvester, Richard B. Brown |
Parametric Yield Analysis and Constrained-Based Supply Voltage Optimization. |
ISQED |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Puneet Gupta 0001, Andrew B. Kahng, Puneet Sharma |
A Practical Transistor-Level Dual Threshold Voltage Assignment Methodology. |
ISQED |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Swarup Bhunia, Hamid Mahmoodi-Meimand, Debjyoti Ghosh, Kaushik Roy 0001 |
Power Reduction in Test-Per-Scan BIST with Supply Gating and Efficient Scan Partitioning. |
ISQED |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Ruchir Puri, Leon Stok, Subhrajit Bhattacharya |
Keeping hot chips cool. |
DAC |
2005 |
DBLP DOI BibTeX RDF |
low power, high-performance, VLSI design |
18 | Hua Zhang 0002, Geoffrey Ye Li |
Clustered OFDM with adaptive antenna arrays for interference suppression. |
IEEE Trans. Wirel. Commun. |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Rouwaida Kanj, Elyse Rosenbaum |
Critical evaluation of SOI design guidelines. |
IEEE Trans. Very Large Scale Integr. Syst. |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Philo Juang, Kevin Skadron, Margaret Martonosi, Zhigang Hu, Douglas W. Clark, Phil Diodato, Stefanos Kaxiras |
Implementing branch-predictor decay using quasi-static memory cells. |
ACM Trans. Archit. Code Optim. |
2004 |
DBLP DOI BibTeX RDF |
Energy aware computing |
18 | Hartmut Klauck |
Quantum and Approximate Privacy. |
Theory Comput. Syst. |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Yuan-Pei Lin, See-May Phoong |
DFT based transceivers with-windowing. |
ISCC |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Jason Helge Anderson, Farid N. Najm |
Low-power programmable routing circuitry for FPGAs. |
ICCAD |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Lin Li 0002, Vijay Degalahal, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin |
Soft error and energy consumption interactions: a data cache perspective. |
ISLPED |
2004 |
DBLP DOI BibTeX RDF |
energy-efficiency, soft error, data cache |
18 | Joohee Kim, Marios C. Papaefthymiou |
Block-based multiperiod dynamic memory design for low data-retention power. |
IEEE Trans. Very Large Scale Integr. Syst. |
2003 |
DBLP DOI BibTeX RDF |
|
18 | Ali Keshavarzi, Kaushik Roy 0001, Charles F. Hawkins, Vivek De |
Multiple-parameter CMOS IC testing with increased sensitivity for IDDQ. |
IEEE Trans. Very Large Scale Integr. Syst. |
2003 |
DBLP DOI BibTeX RDF |
|
18 | Heather Hanson, M. S. Hrishikesh, Vikas Agarwal, Stephen W. Keckler, Doug Burger |
Static energy reduction techniques for microprocessor caches. |
IEEE Trans. Very Large Scale Integr. Syst. |
2003 |
DBLP DOI BibTeX RDF |
|
18 | S. Cservany, Jean-Marc Masgonty, Christian Piguet |
Stand-by Power Reduction for Storage Circuits. |
PATMOS |
2003 |
DBLP DOI BibTeX RDF |
|
18 | Wei Zhang 0002, Mustafa Karaköy, Mahmut T. Kandemir, Guangyu Chen |
A compiler approach for reducing data cache energy. |
ICS |
2003 |
DBLP DOI BibTeX RDF |
data caches, energy optimization, compiler analysis |
18 | Dakshi Agrawal, Josyula R. Rao, Pankaj Rohatgi |
Multi-channel Attacks. |
CHES |
2003 |
DBLP DOI BibTeX RDF |
EM Analysis, Side-channel attacks, DPA, Power Analysis, DEMA |
18 | R. M. Nussbaumer, D. G. Rüegg, L. M. Studer, J.-P. Gabriel |
Computer simulation of the motoneuron pool-muscle complex. I. Input system and motoneuron pool. |
Biol. Cybern. |
2002 |
DBLP DOI BibTeX RDF |
|
18 | Swarup Bhunia, Hai Li, Kaushik Roy 0001 |
A High Performance IDDQ Testable Cache for Scaled CMOS Technologies. |
Asian Test Symposium |
2002 |
DBLP DOI BibTeX RDF |
|
18 | Mahesh Ketkar, Sachin S. Sapatnekar |
Standby power optimization via transistor sizing and dual threshold voltage assignment. |
ICCAD |
2002 |
DBLP DOI BibTeX RDF |
|
18 | Lipeng Cao |
Circuit power estimation using pattern recognition techniques. |
ICCAD |
2002 |
DBLP DOI BibTeX RDF |
|
18 | Hyun-Jeong Kim, Dong Hoon Lee 0001, Moti Yung |
Privacy against Piracy: Protecting Two-Level Revocable P-K Traitor Tracing. |
ACISP |
2002 |
DBLP DOI BibTeX RDF |
|
18 | Hartmut Klauck |
On Quantum and Approximate Privacy. |
STACS |
2002 |
DBLP DOI BibTeX RDF |
|
18 | Mun Wai Ng, Yuen-Hui Chee, Yong Ping Xu, Gamani Karunasiri |
On-chip compensation of dark current in infrared focal plane arrays. |
ISCAS (3) |
2001 |
DBLP DOI BibTeX RDF |
|
18 | Sreejit Chakravarty, Sujit T. Zachariah |
STBM: a fast algorithm to simulate IDDQ tests forleakage faults. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2000 |
DBLP DOI BibTeX RDF |
|
18 | Vivek De, Shekhar Borkar |
Low power and high performance design challenges in future technologies. |
ACM Great Lakes Symposium on VLSI |
2000 |
DBLP DOI BibTeX RDF |
low-power design, memory, microprocessor, VLSI design |
18 | Shigeru Ohnishi, Michinori Nishihara |
A New Light-Based Logic IC Screening Method. |
DFT |
2000 |
DBLP DOI BibTeX RDF |
|
18 | Michael S. Shur, Tor A. Fjeldly, Trond Ytterdal |
Transistor Modeling for the VDSM Era. |
ISQED |
2000 |
DBLP DOI BibTeX RDF |
field effect transistors, parameter extraction, SPICE, device modeling |
18 | Amit Sinha, Anantha P. Chandrakasan |
Energy Aware Software. |
VLSI Design |
2000 |
DBLP DOI BibTeX RDF |
|
18 | Qi Wang, Sarma B. K. Vrudhula |
An Investigation of Power Delay Tradeoffs for Dual Vt CMOS Circuits. |
ICCD |
1999 |
DBLP DOI BibTeX RDF |
low power, CMOS circuits, dual Vt |
18 | Kaushik Roy 0001, Liqiong Wei, Zhanping Chen |
Multiple-Vdd multiple-Vth CMOS (MVCMOS) for low power applications. |
ISCAS (1) |
1999 |
DBLP DOI BibTeX RDF |
|
18 | M. Sivabalan, Stafford E. Tavares, Lloyd E. Peppard |
On the Design of SP Networks From an Information Theoretic Point of View. |
CRYPTO |
1992 |
DBLP DOI BibTeX RDF |
|
18 | Garima Thakral, Saraju P. Mohanty, Dhruva Ghai, Dhiraj K. Pradhan |
A DOE-ILP assisted conjugate-gradient based power and stability optimization in High-K Nano-CMOS SRAM. |
ACM Great Lakes Symposium on VLSI |
2010 |
DBLP DOI BibTeX RDF |
nano-CMOS, power, leakage, SRAM, static noise margin |
18 | Sara Porat, Boaz Carmeli, Tamar Domany, Tal Drory, Ksenya Kveler, Alex Melament, Haim Nelken |
Masking Gateway for Enterprises. |
Languages: From Formal to Natural |
2009 |
DBLP DOI BibTeX RDF |
Data Leakage Prevention (DLP), de-identification, Service Oriented Architecture (SOA), anonymization, Optical Character Recognition (OCR), data masking |
18 | David Bol, Dina Kamel, Denis Flandre, Jean-Didier Legat |
Nanometer MOSFET effects on the minimum-energy point of 45nm subthreshold logic. |
ISLPED |
2009 |
DBLP DOI BibTeX RDF |
short-channel effects, subthreshold logic, variability, cmos digital integrated circuits, ultra-low power, gate leakage |
18 | Xin Huang, Kenli Li 0001, Renfa Li |
A Energy Efficient Scheduling Base on Dynamic Voltage and Frequency Scaling for Multi-core Embedded Real-Time System. |
ICA3PP |
2009 |
DBLP DOI BibTeX RDF |
real-time, energy-efficiency, embedded, DVS, multi-core, leakage power, EDF |
18 | Werner Schindler, Colin D. Walter |
Optimal Recovery of Secret Keys from Weak Side Channel Traces. |
IMACC |
2009 |
DBLP DOI BibTeX RDF |
power analysis, Side channel leakage, optimal strategy |
18 | Yasuhiro Fujii, Ryu Ebisawa, Satoshi Kai, Takaaki Yamada, Yoshinori Honda |
High-accuracy text search of hardcopy logs. |
iiWAS |
2009 |
DBLP DOI BibTeX RDF |
MFP, OCR, information leakage, text search, paper document |
18 | Cesare Ferri, Sherief Reda, R. Iris Bahar |
Parametric yield management for 3D ICs: Models and strategies for improvement. |
ACM J. Emerg. Technol. Comput. Syst. |
2008 |
DBLP DOI BibTeX RDF |
performance, process variations, leakage, 3D integration, yield management |
18 | Kasper Bonne Rasmussen, Srdjan Capkun |
Location privacy of distance bounding protocols. |
CCS |
2008 |
DBLP DOI BibTeX RDF |
wireless security, information leakage, distance bounding |
18 | Go Ohtake, Goichiro Hanaoka, Kazuto Ogawa |
An Efficient Strong Key-Insulated Signature Scheme and Its Application. |
EuroPKI |
2008 |
DBLP DOI BibTeX RDF |
strong key-insulated signature, key leakage, DL assumption, random oracle model, adaptive security |
18 | Bahman Kheradmand Boroujeni, Christian Piguet, Yusuf Leblebici |
Reverse Vgs Static CMOS (RVGS-SCMOS); A New Technique for Dynamically Compensating the Process Variations in Sub-threshold Designs. |
PATMOS |
2008 |
DBLP DOI BibTeX RDF |
Sub-VToperation, variation compensation, logic style, active-mode leakage, process variations |
18 | Biswajit Mishra, Bashir M. Al-Hashimi |
Subthreshold FIR Filter Architecture for Ultra Low Power Applications. |
PATMOS |
2008 |
DBLP DOI BibTeX RDF |
Subthreshold design, Minimum Energy Point, Ultra Low Power Design, Leakage, FIR |
18 | Kazuki Yoneyama |
Efficient and Strongly Secure Password-Based Server Aided Key Exchange (Extended Abstract). |
INDOCRYPT |
2008 |
DBLP DOI BibTeX RDF |
password-based key exchange, password-based server aided key exchange, leakage of internal states, undetectable on-line dictionary attack |
18 | Paulo F. Butzen, Leomar S. da Rosa Jr., Erasmo J. D. Chiappetta Filho, Dionatan S. Moura, André Inácio Reis, Renato P. Ribas |
Simple and accurate method for fast static currentestimation in cmos complex gates with interaction ofleakage mechanisms. |
ACM Great Lakes Symposium on VLSI |
2008 |
DBLP DOI BibTeX RDF |
leakage estimation, logic design, cmos gates |
18 | Huifang Qin, Animesh Kumar, Kannan Ramchandran, Jan M. Rabaey, Prakash Ishwar |
Error-Tolerant SRAM Design for Ultra-Low Power Standby Operation. |
ISQED |
2008 |
DBLP DOI BibTeX RDF |
DRV, low power, ECC, leakage, SRAM, variation, low voltage, error tolerant |
18 | Po-Kuan Huang, Soheil Ghiasi |
Efficient and scalable compiler-directed energy optimization for realtime applications. |
ACM Trans. Design Autom. Electr. Syst. |
2007 |
DBLP DOI BibTeX RDF |
energy-aware compiler, Leakage, technology scaling |
18 | Swarup Bhunia, Massood Tabib-Azar, Daniel G. Saab |
Ultralow-Power Reconfigurable Computing with Complementary Nano-Electromechanical Carbon Nanotube Switches. |
ASP-DAC |
2007 |
DBLP DOI BibTeX RDF |
reconfigurable instant-on system, ultralow-power reconfigurable computing, complementary nanoelectromechanical carbon nanotube switches, coplanar carbon nanotubes, low operation voltages, built-in energy storage, CNEMS, stable on-off state, latching mechanism, nonvolatile memory-mode operation, CMOS transistors, system development, leakage current |
18 | Aveek Sarkar, Shen Lin, Kai Wang |
A methodology for analysis and verification of power gated circuits with correlated results. |
ISLPED |
2007 |
DBLP DOI BibTeX RDF |
RedHawk, standby leakage current, design, verification, analysis, power gate, MTCMOS |
18 | Koji Kida, Hisashi Sakamoto, Hideo Shimazu, Hiroyuki Tarumi |
InfoCage: A Development and Evaluation of Confidential File Lifetime Monitoring Technology by Analyzing Events from File Systems and GUIs. |
IWSEC |
2007 |
DBLP DOI BibTeX RDF |
Secure Office, Information Leakage Countemesure, Operation Monitoring, Knowledge Base, Log Analysis |
18 | Chanseok Hwang, Peng Rong, Massoud Pedram |
Sleep transistor distribution in row-based MTCMOS designs. |
ACM Great Lakes Symposium on VLSI |
2007 |
DBLP DOI BibTeX RDF |
leakage minimization, placement, MTCMOS |
18 | Andrea Calimera, Antonio Pullini, Ashoka Visweswara Sathanur, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino |
Design of a family of sleep transistor cells for a clustered power-gating flow in 65nm technology. |
ACM Great Lakes Symposium on VLSI |
2007 |
DBLP DOI BibTeX RDF |
layout, leakage power, insertion, standard-cell, sleep transistor |
18 | Zhiyu Liu, Volkan Kursun |
Charge Recycling Between Virtual Power and Ground Lines for Low Energy MTCMOS. |
ISQED |
2007 |
DBLP DOI BibTeX RDF |
Multi-threshold voltage CMOS, gated power, gated ground, sleep switch, subthreshold leakage, charge recycling |
18 | T. M. Mak, Sani R. Nassif |
Guest Editors' Introduction: Process Variation and Stochastic Design and Test. |
IEEE Des. Test Comput. |
2006 |
DBLP DOI BibTeX RDF |
silicon manufacturing processes, adaptive circuits, process variation, process monitoring, subthreshold leakage |
18 | Lan Gao, Jun Yang 0002, Marek Chrobak, Youtao Zhang, San Nguyen, Hsien-Hsin S. Lee |
A low-cost memory remapping scheme for address bus protection. |
PACT |
2006 |
DBLP DOI BibTeX RDF |
address bus leakage protection, secure processor |
18 | Ali Bastani, Charles A. Zukowski |
Monotonic static CMOS tradeoffs in sub-100nm technologies. |
ACM Great Lakes Symposium on VLSI |
2006 |
DBLP DOI BibTeX RDF |
gate leakage current, monotonic static CMOS logic, low power design, noise tolerance, static power |
18 | De-Shiuan Chiou, Shih-Hsin Chen, Shih-Chieh Chang, Chingwei Yeh |
Timing driven power gating. |
DAC |
2006 |
DBLP DOI BibTeX RDF |
leakage current, power gating, IR drop |
18 | Mathieu Ciet, Marc Joye |
Elliptic Curve Cryptosystems in the Presence of Permanent and Transient Faults. |
Des. Codes Cryptogr. |
2005 |
DBLP DOI BibTeX RDF |
elliptic curve cryptography, fault attacks, fault analysis, information leakage |
18 | Wei Huang 0004, Eric Humenay, Kevin Skadron, Mircea R. Stan |
The need for a full-chip and package thermal model for thermally optimized IC designs. |
ISLPED |
2005 |
DBLP DOI BibTeX RDF |
leakage, package, thermal model, temperature-aware design |
18 | Walid Elgharbawy, Pradeep Golconda, Magdy A. Bayoumi |
Noise-tolerant high fan-in dynamic CMOS circuit design. |
ACM Great Lakes Symposium on VLSI |
2005 |
DBLP DOI BibTeX RDF |
high fan-in domino, CMOS, noise-tolerant, subthreshold leakage, dynamic circuits |
18 | John Wei, Chris Rowen |
Implementing low-power configurable processors: practical options and tradeoffs. |
DAC |
2005 |
DBLP DOI BibTeX RDF |
PVT (process, voltage, temperature), configurable embedded processor, dynamic power efficiency, scaled VDD, low-power, leakage power, SOC (system on chip), dynamic power |
18 | Ravindra Jejurikar, Rajesh K. Gupta 0001 |
Procrastination scheduling in fixed priority real-time systems. |
LCTES |
2004 |
DBLP DOI BibTeX RDF |
critical speed, procrastication scheduling, real-time systems, leakage power, fixed priority, low power scheduling |
18 | Maurice Meijer, Francesco Pessolano, José Pineda de Gyvez |
Technology exploration for adaptive power and frequency scaling in 90nm CMOS. |
ISLPED |
2004 |
DBLP DOI BibTeX RDF |
adaptive body bias, low power, CMOS, performance optimization, leakage, adaptive voltage scaling |
18 | Bhaskar Chatterjee, Manoj Sachdev, Ram Krishnamurthy 0001 |
A CPL-based dual supply 32-bit ALU for sub 180nm CMOS technologies. |
ISLPED |
2004 |
DBLP DOI BibTeX RDF |
DSM leakage control and scaling trends, dual supply ALU design, low power techniques |
18 | Toshinari Takayanagi, Jinuk Luke Shin, Bruce Petrick, Jeffrey Y. Su, Ana Sonia Leon |
A dual-core 64b ultraSPARC microprocessor for dense server applications. |
DAC |
2004 |
DBLP DOI BibTeX RDF |
L2, UltraSPARC, coupling noise, deep submicron technology, dense server, dual-core, throughput computing, cache, multiprocessor, leakage, NBTI, negative bias temperature instability |
18 | Wei Zhang 0002, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin |
Performance, energy, and reliability tradeoffs in replicating hot cache lines. |
CASES |
2003 |
DBLP DOI BibTeX RDF |
cache reliability, line replication, cache memories, leakage power |
18 | Kwang-Il Oh, Lee-Sup Kim |
A clock delayed sleep mode domino logic for wide dynamic OR gate. |
ISLPED |
2003 |
DBLP DOI BibTeX RDF |
clock delay, low power, leakage, sleep mode, dynamic circuits |
18 | Werner Schindler, Colin D. Walter |
More Detail for a Combined Timing and Power Attack against Implementations of RSA. |
IMACC |
2003 |
DBLP DOI BibTeX RDF |
statistical decision problem, power analysis, exponentiation, timing attack, RSA cryptosystem, side channel leakage, Montgomery modular multiplication |
18 | Ryo Fujioka, Kiyokazu Katayama, Ryotaro Kobayashi, Hideki Ando, Toshio Shimada |
A preactivating mechanism for a VT-CMOS cache using address prediction. |
ISLPED |
2002 |
DBLP DOI BibTeX RDF |
L1 data cache, leakage current, address prediction |
18 | Michael Zhang, Krste Asanovic |
Fine-grain CAM-tag cache resizing using miss tags. |
ISLPED |
2002 |
DBLP DOI BibTeX RDF |
cache resizing, low-power, energy efficiency, leakage current, content-addressable-memory |
18 | Kimiyoshi Usami, Naoyuki Kawabe, Masayuki Koizumi, Katsuhiro Seta, Toshiyuki Furusawa |
Automated selective multi-threshold design for ultra-low standby applications. |
ISLPED |
2002 |
DBLP DOI BibTeX RDF |
standby leakage current, automated design, multi-threshold |
18 | Fei Li 0003, Lei He 0001, Kewal K. Saluja |
Estimation of Maximum Power-Up Current. |
ASP-DAC/VLSI Design |
2002 |
DBLP DOI BibTeX RDF |
current estimation, ATPG algorithm, leakage reduction |
18 | George Sery, Shekhar Borkar, Vivek De |
Life is CMOS: why chase the life after? |
DAC |
2002 |
DBLP DOI BibTeX RDF |
leakage control, microarchitecture, technology scaling |
18 | Karine Gandolfi, Christophe Mourtel, Francis Olivier |
Electromagnetic Analysis: Concrete Results. |
CHES |
2001 |
DBLP DOI BibTeX RDF |
smart cards, DPA, SPA, DEMA, side channel leakage, SEMA, electromagnetic analysis |
18 | Claude Thibeault |
A novel probabilistic approach for IC diagnosis based on differential quiescent current signatures. |
VTS |
1997 |
DBLP DOI BibTeX RDF |
IC diagnosis, probabilistic differential quiescent current signature, noise source, embedded logic, robustness, maximum likelihood estimation, maximum likelihood estimation, IDDQ testing, subthreshold leakage current |
18 | Adam L. Young, Moti Yung |
The Prevalence of Kleptographic Attacks on Discrete-Log Based Cryptosystems. |
CRYPTO |
1997 |
DBLP DOI BibTeX RDF |
DSA signature, Menezes-Vanstone PKCS, Schnorr signature algorithm, protocol abuse, leakage-bandwidth, cryptographic system implementations, randomness, pseudorandomness, Diffie-Hellman, subliminal channels, kleptography, setup, ElGamal encryption, ElGamal signature, Discrete-Log |
18 | Hisashi Kondo, Kwang-Ting Cheng |
An Efficient Compact Test Generator for IDDQ Testing. |
Asian Test Symposium |
1996 |
DBLP DOI BibTeX RDF |
Selective IDDQ, Pattern Compaction, Pseudo Stuck-at Fault, Essential Fault, Test, ATPG, Fault Model, Testability, IDDQ, Leakage Fault |
18 | Weiwei Mao, Ravi K. Gulati |
Quietest: A methodology for selecting IDDQ test vectors. |
J. Electron. Test. |
1992 |
DBLP DOI BibTeX RDF |
weak faults, I DDQ testing, Leakage faults |
15 | Jung Yeon Hwang, Ji Young Chun, Dong Hoon Lee 0001 |
A note on leakage-resilient authenticated key exchange. |
IEEE Trans. Wirel. Commun. |
2009 |
DBLP DOI BibTeX RDF |
|
15 | Panagiotis Papadimitriou 0002, Hector Garcia-Molina |
A Model for Data Leakage Detection. |
ICDE |
2009 |
DBLP DOI BibTeX RDF |
|
15 | Krzysztof Pietrzak |
A Leakage-Resilient Mode of Operation. |
EUROCRYPT |
2009 |
DBLP DOI BibTeX RDF |
|
15 | Sheng-Chih Lin, Kaustav Banerjee |
A Design-Specific and Thermally-Aware Methodology for Trading-Off Power and Performance in Leakage-Dominant CMOS Technologies. |
IEEE Trans. Very Large Scale Integr. Syst. |
2008 |
DBLP DOI BibTeX RDF |
|
15 | Ja Chun Ku, Yehea I. Ismail |
Area Optimization for Leakage Reduction and Thermal Stability in Nanometer-Scale Technologies. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2008 |
DBLP DOI BibTeX RDF |
|
15 | Scott Rose, Anastase Nakassis |
Minimizing information leakage in the DNS. |
IEEE Netw. |
2008 |
DBLP DOI BibTeX RDF |
|
15 | Marco Bucci, Raimondo Luzzi, Santos Torres Vargas |
A Low Leakage Non-Volatile Memory Voltage Pulse Generator for RFID Applications. |
DDECS |
2008 |
DBLP DOI BibTeX RDF |
|
15 | Imad M. Abbadi, Muntaha Alawneh |
Preventing Insider Information Leakage for Enterprises. |
SECURWARE |
2008 |
DBLP DOI BibTeX RDF |
|
15 | Enrico Macii, Letícia Maria Veiras Bolzani, Andrea Calimera, Alberto Macii, Massimo Poncino |
Integrating Clock Gating and Power Gating for Combined Dynamic and Leakage Power Optimization in Digital CMOS Circuits. |
DSD |
2008 |
DBLP DOI BibTeX RDF |
|
15 | Muntaha Alawneh, Imad M. Abbadi |
Preventing information leakage between collaborating organisations. |
ICEC |
2008 |
DBLP DOI BibTeX RDF |
collaborating organisations, enterprise rights management, share but protect |
15 | Jungseob Lee, Lin Xie, Azadeh Davoodi |
A Dual-Vt low leakage SRAM array robust to process variations. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
15 | Ashoka Visweswara Sathanur, Andrea Calimera, Antonio Pullini, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino |
On quantifying the figures of merit of power-gating for leakage power minimization in nanometer CMOS circuits. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
15 | Meikang Qiu, Jiande Wu, Jingtong Hu, Yi He 0001, Edwin Hsing-Mean Sha |
Dynamic and Leakage Power Minimization with Loop Voltage Scheduling and Assignment. |
EUC (1) |
2008 |
DBLP DOI BibTeX RDF |
|
15 | Zhiyu Liu, Sherif A. Tawfik, Volkan Kursun |
Statistical Data Stability and Leakage Evaluation of FinFET SRAM Cells with Dynamic Threshold Voltage Tuning under Process Parameter Fluctuations. |
ISQED |
2008 |
DBLP DOI BibTeX RDF |
static noise margin distribution, robust operation, active power, standby power distribution, double gate MOSFET, process variations, Cache memory |
15 | Mirette Sadek, Alireza Tarighat, Ali H. Sayed |
A Leakage-Based Precoding Scheme for Downlink Multi-User MIMO Channels. |
IEEE Trans. Wirel. Commun. |
2007 |
DBLP DOI BibTeX RDF |
|
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