Search results for "spacer"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
89	M. Haykel Ben Jamaa, Gianfranco Cerofolini, Yusuf Leblebici, Giovanni De Micheli	Complete nanowire crossbar framework optimized for the multi-spacer patterning technique.	CASES	2009	DBLP DOI BibTeX RDF	MSPT, spacer technique, decoder, emerging technologies, gray code, crossbars, nanowires
69	M. Haykel Ben Jamaa, Yusuf Leblebici, Giovanni De Micheli	Decoding nanowire arrays fabricated with the multi-spacer patterning technique.	DAC	2009	DBLP DOI BibTeX RDF	MSPT, spacer technique, decoder, emerging technologies, crossbar, nanowires
69	Woo Young Choi, Jong Duk Lee, Byung-Gook Park	Reverse-order source/drain formation with double offset spacer (RODOS) for CMOS low-power, high-speed and low-noise amplifiers.	ISLPED	2003	DBLP DOI BibTeX RDF	RODOS, offset spacer, reverse-order, low-power, high-speed, low-noise, amplifier
66	Danil Sokolov, Julian P. Murphy, Alexandre V. Bystrov, Alexandre Yakovlev	Design and Analysis of Dual-Rail Circuits for Security Applications.	IEEE Trans. Computers	2005	DBLP DOI BibTeX RDF	Alternating spacer protocol, dual-rail encoding, hazard-free design, cryptography, power analysis, design automation, hardware security
59	Emily K. Lada, James R. Wilson	SBatch: a spaced batch means procedure for simulation analysis.	WSC	2007	DBLP DOI BibTeX RDF
46	Leonard Barolli, Kuninobu Tanno	A Fuzzy Policing Mechanism for Still Picture in ATM Networks.	LCN	1996	DBLP DOI BibTeX RDF	selectivity characteristics, fuzzy policing mechanism, B-ISDN networks, traffic parameters control, source traffic characteristics, mean cell rate, peak cell rate, peak burst duration, cell spacer, bursty traffic sources, still picture source, simulation, quality of service, performance evaluation, asynchronous transfer mode, asynchronous transfer mode, ATM networks, fuzzy set theory, statistical multiplexing, virtual connection, link utilization
46	Roland Aigner, Mira Alida Haberfellner, Michael Haller	spaceR: Knitting Ready-Made, Tactile, and Highly Responsive Spacer-Fabric Force Sensors for Continuous Input.	UIST	2022	DBLP DOI BibTeX RDF
46	Chen Wu, Adrian Vaisman Chasin, Steven Demuynck, Naoto Horiguchi, Kris Croes	Conduction and Breakdown Mechanisms in Low-k Spacer and Nitride Spacer Dielectric Stacks in Middle of Line Interconnects.	IRPS	2020	DBLP DOI BibTeX RDF
46	Vatcharin Saithongin, Boonchai Techaumnat	Numerical analysis of electric field at the contact point between a spacer aerial cable and a spacer.	ICEEI	2011	DBLP DOI BibTeX RDF
46	J. Guo, Kwabena A. Narh	Buckling Analysis of a Building Stud-Spacer Assembly and Simulation of Spacer Punching Process.	Simul.	2000	DBLP DOI BibTeX RDF
46	Hannelore T. Koller, Kathleen A. Frondorf, Patricia D. Maschner, Jack C. Vaughn	In vivo transcription from multiple spacer rRNA gene promoters during early development and evolution of the intergenic spacer in the brine shrimp Artemia.	Nucleic Acids Res.	1987	DBLP DOI BibTeX RDF
42	Kyriakos Satlas, John Kamaras, Anthony Catsoulis, Nikolas Mitrou	Design and Implementation of an Adaptive Burst Spacer for Effective-Rate Enforcement in ABR Traffic.	ISCC	2001	DBLP DOI BibTeX RDF
39	Jinhai Cai	Enhanced HMM for the Recognition of Sigma70 Promoters in Escherichia coli.	DICTA	2008	DBLP DOI BibTeX RDF
39	Frederic Worm, Patrick Thiran, Paolo Ienne	A Unified Coding Framework for Delay-Insensitivity.	ASYNC	2005	DBLP DOI BibTeX RDF
39	Danil Sokolov, Julian P. Murphy, Alexandre V. Bystrov, Alexandre Yakovlev	Improving the Security of Dual-Rail Circuits.	CHES	2004	DBLP DOI BibTeX RDF
39	Dmitry Yakovlev, Edo S. Boek	Structure of Bilayer Membranes of Gemini Surfactants with Rigid and Flexible Spacers from MD Simulations.	International Conference on Computational Science	2003	DBLP DOI BibTeX RDF
39	Fabrice Guillemin, Jacqueline Boyer, Olivier Dugeon, Christophe Mangin	Analysis of Cell Spacing on a TCP Flow Mapped onto an ATM Connection.	NETWORKING	2000	DBLP DOI BibTeX RDF
27	Santhosh Coimbatore Vaidyanathan, Amit Mangesh Brahme, Sukumar Jairam	Techniques for Early Package Closure in System-in-Packages.	ISQED	2008	DBLP DOI BibTeX RDF	spacer, landing, SoC, SIP, CSP, MCM, POP
27	H. C. Srinivasaiah, Navakanta Bhat	Response Surface Modeling of 100nm CMOS Process Technology using Design of Experiment.	VLSI Design	2004	DBLP DOI BibTeX RDF	Disposable spacer, Transmission of moments technique, Plackett-Burman design, Sensitivity analysis, Statistical modeling, CMOS technology, Response surface methodology, Monte carlo analysis
23	Sankarsan Mohanty, Eugene Su, Chao-Ching Ho	Enhancing titanium spacer defect detection through reinforcement learning-optimized digital twin and synthetic data generation.	J. Electronic Imaging	2024	DBLP DOI BibTeX RDF
23	Rinku Rani Das, Alex James 0001	Multi-Channel Step FinFET With Spacer Engineering.	IEEE Access	2024	DBLP DOI BibTeX RDF
23	Aleksander Sulkowski, Clément Bouton, Chad Swanson	Syn-CpG-Spacer: A Panel web app for synonymous recoding of viral genomes with CpG dinucleotides.	J. Open Source Softw.	2024	DBLP DOI BibTeX RDF
23	Yun-Jae Oh, Inyoung Lee, Yunejae Suh, Daewoong Kang, Il Hwan Cho	3D NAND Flash Memory Cell Current and Interference Characteristics Improvement With Multiple Dielectric Spacer.	IEEE Access	2023	DBLP DOI BibTeX RDF
23	Suvankar Ghosh, Sunanda Chatterjee, Priyadarshi Satpati	Effect of Spacer Length Modification of the Cationic Side Chain on the Energetics of Antimicrobial Peptide Binding to Membrane-Mimetic Bilayers.	J. Chem. Inf. Model.	2023	DBLP DOI BibTeX RDF
23	Sunitha Bhukya, Bheema Rao Nistala	Design optimization of junctionless bottom spacer tapered FinFET: Device to circuit level implementation.	Microelectron. J.	2023	DBLP DOI BibTeX RDF
23	Bhavya Kumar, Megha Sharma, Rishu Chaujar	Junctionless-accumulation-mode stacked gate GAA FinFET with dual-k spacer for reliable RFIC design.	Microelectron. J.	2023	DBLP DOI BibTeX RDF
23	Yong Li 0028, Shidi Wei, Xuan Liu, Yinzheng Luo, Yafeng Li, Feng Shuang 0002	An Improved Insulator and Spacer Detection Algorithm Based on Dual Network and SSD.	IEICE Trans. Inf. Syst.	2023	DBLP DOI BibTeX RDF
23	Muhammad R. Fabio, Syarif Hidayat, Umar Khayam	Effect of HV Guard in Reducing Electric Field Intensity of Gas Insulated Switchgear Spacer.	ICEEI	2023	DBLP DOI BibTeX RDF
23	Pitchayapatchaya Srikram, Thanasin Bunnam	A Design of Low Voltage Spacer Detector Circuits for Asynchronous Ternary Logic System.	TENCON	2023	DBLP DOI BibTeX RDF
23	Hans Mertens, M. Hosseini, Thomas Chiarella, D. Zhou, S. Wang, G. Mannaert, E. Dupuy, D. Radisic, Z. Tao, Y. Oniki, Andriy Hikavyy, R. Rosseel, A. Mingardi, S. Choudhury, P. Puttarame Gowda, F. Sebaai, A. Peter, Kevin Vandersmissen, J. P. Soulie, An De Keersgieter, L. Petersen Barbosa Lima, C. Cavalcante, D. Batuk, G. T. Martinez, J. Geypen, F. Seidel, K. Paulussen, P. Favia, Jürgen Bömmels, Roger Loo, P. Wong, A. Sepulveda Marquez, B. T. Chan, Jérôme Mitard, S. Subramanian, S. Demuynck, E. Dentoni Litta, N. Horiguchi, S. Samavedam, S. Biesemans	Nanosheet-based Complementary Field-Effect Transistors (CFETs) at 48nm Gate Pitch, and Middle Dielectric Isolation to enable CFET Inner Spacer Formation and Multi-Vt Patterning.	VLSI Technology and Circuits	2023	DBLP DOI BibTeX RDF
23	Zhu He, Tang Wenpeng, Renqi Zhang, Weiqi Wang, Hanliang Liao	Dynamic Response Analysis of Asynchronous Deicing of Quad Bundle Conductor Spacer System During DC Ice Melting.	IEEE Access	2022	DBLP DOI BibTeX RDF
23	Suzanne Oude Hengel, Loe M. G. Feijs	Exploration of Knitted Spacer Fabrics using Grasshopper.	CoRR	2022	DBLP DOI BibTeX RDF
23	Ming-Chun Hong, Yao-Jen Chang, Yu-Chen Hsin, Liang-Ming Liu, Kuan-Ming Chen, Yi-Hui Su, Guan-Long Chen, Shan-Yi Yang, I-Jung Wang, Sk. Ziaur Rahaman, Hsin-Han Lee, Shih-Ching Chiu, Chen-Yi Shih, Chih-Yao Wang, Fang-Ming Chen, Jeng-Hua Wei, Shyh-Shyuan Sheu, Wei-Chung Lo, Minn-Tsong Lin, Chih-I Wu, Tuo-Hung Hou	A 4K-400K Wide Operating-Temperature-Range MRAM Technology with Ultrathin Composite Free Layer and Magnesium Spacer.	VLSI Technology and Circuits	2022	DBLP DOI BibTeX RDF
23	Paul Espinosa Peralta, Verónica Palomino-Díaz, Pablo Rodríguez Herrerías, Carlos Rodríguez del Castillo, Carmen María Pedraza Cubero, Juan Pablo Yuste, Paulino Aparicio Cillán, Rafael Mesía López, Guillermo Águila Rodríguez, Víctor Pablo Fernández Franco, Miguel Angel Sánchez Urán, Manuel Ferre	ROSE: Robot for Automatic Spacer Installation in Overhead Power Lines.	ROBOT (2)	2022	DBLP DOI BibTeX RDF
23	Jyoti Patel, Shashank Banchhor, Surila Guglani, Avirup Dasgupta, Sourajeet Roy, Anand Bulusu, Sudeb Dasgupta	Design optimization Using Symmetric/Asymmetric Spacer for 14 nm Multi-Fin Tri-gate Fin-FET for Mid-Band 5G Applications.	VLSID	2022	DBLP DOI BibTeX RDF
23	Ahmed T. A. Boraei, Matti Haukka, Ahmed A. M. Sarhan, Saied M. Soliman, Abdullah Mohammed Al-Majid, Assem Barakat	Synthesis of C2-Symmetrical Bis-(β-Enamino-Pyran-2, 4-dione) Derivative Linked via 1, 6-Hexylene Spacer: X-ray Crystal Structures, Hishfeld Studies and DFT Calculations of Mono- and Bis-(Pyran-2, 4-diones) Derivatives.	Symmetry	2021	DBLP DOI BibTeX RDF
23	Ahmet Yigit Arabul, Celal Fadil Kumru, Fatma Keskin Arabul, Ibrahim Senol	Experimental investigation on creep characteristic of the spacer between winding turns of power transformers.	Trans. Inst. Meas. Control	2021	DBLP DOI BibTeX RDF
23	Tadeu Mota Frutuoso, Jose Lugo-Alvarez, Xavier Garros, Laurent Brunet, Joris Lacord, Louis Gerrer, Mikaël Cassé, Edoardo Catapano, Claire Fenouillet-Béranger, François Andrieu, Fred Gaillard, Philippe Ferrari	Impact of spacer interface charges on performance and reliability of low temperature transistors for 3D sequential integration.	IRPS	2021	DBLP DOI BibTeX RDF
23	Punithavathi Sundaramurthy, Brandon White, Wendy Lee	A Computational Approach to Identify Transcription Factor Binding Sites Containing Spacer Regions.	CSCI	2021	DBLP DOI BibTeX RDF
23	Lea Albaugh, James McCann, Scott E. Hudson, Lining Yao	Engineering Multifunctional Spacer Fabrics Through Machine Knitting.	CHI	2021	DBLP DOI BibTeX RDF
23	Mengjie Wu, Chao Zhi, Jiaguang Meng, Xinrui Xu, Guan-Lin Wang, Ling-Jie Yu, Menghe Miao	3D Spacer Fabric Structure for the Prevention and Care of Pressure Ulcers.	IEEE Access	2020	DBLP DOI BibTeX RDF
23	Guo-Ming Ma, Hongyang Zhou, Ya-Bo Li, Han-Chi Zhang, Wei-Qi Qin, Cheng-Rong Li, Chao Yan	High-Resolution Temperature Distribution Measurement of GIL Spacer Based on OFDR and Ultraweak FBGs.	IEEE Trans. Instrum. Meas.	2020	DBLP DOI BibTeX RDF
23	Ning Huang, Weijing Liu, Qinghua Li, Wei Bai, Xiadong Tang, Ting Yang	Thermal and electrical performance investigation of FinFET with encased air-gap gate sidewalls from spacer encapsulation layer material and structure parameter perspectives.	Microelectron. J.	2020	DBLP DOI BibTeX RDF
23	Xuan Liu, Yong Li 0028, Feng Shuang 0002, Fang Gao 0001, Xiang Zhou, Xingzhi Chen	ISSD: Improved SSD for Insulator and Spacer Online Detection Based on UAV System.	Sensors	2020	DBLP DOI BibTeX RDF
23	Yingying Dou, Lin Chen, Hui Li 0043, Biao Tang, Alex Henzen, Guofu Zhou	Photolithography Fabricated Spacer Arrays Offering Mechanical Strengthening and Oil Motion Control in Electrowetting Displays.	Sensors	2020	DBLP DOI BibTeX RDF
23	Garam Kim, JangHyun Kim, Sangwan Kim	Optimization of spacer and source/channel junction to improve TFET characteristics.	IEICE Electron. Express	2020	DBLP DOI BibTeX RDF
23	Tian Shen, Koji Watanabe, Huimei Zhou, Michael Belyansky, Erin Stuckert, Jingyun Zhang, Andrew Greene, Veeraraghavan S. Basker, Miaomiao Wang 0006	A new technique for evaluating stacked nanosheet inner spacer TDDB reliability.	IRPS	2020	DBLP DOI BibTeX RDF
23	Harish Agarwal, Sushri Mukherjee, Sumana Chattaraj, Md. Irfan Khan, Dharmbir Prasad	Development of Quad Spacer Damper to suppress oscillation in 765 kV Transmission Line.	ICCCNT	2020	DBLP DOI BibTeX RDF
23	Jun-Sik Yoon, Jinsu Jeong, Seunghwan Lee, Rock-Hyun Baek	Punch-Through-Stopper Free Nanosheet FETs With Crescent Inner-Spacer and Isolated Source/Drain.	IEEE Access	2019	DBLP DOI BibTeX RDF
23	Lang Yang, Xia Zhang, Yuqi Liu, Hao Li, Shaofu Qiu, Peng Li 0041, Hongbin Song	CSESA: an R package to predict Salmonella enterica serotype based on newly incorporated spacer pairs of CRISPR.	BMC Bioinform.	2019	DBLP DOI BibTeX RDF
23	Ramarao Garike, Ganesh C. Patil	Si3N4: HfO2 dual-k spacer bulk planar junctionless transistor for mixed signal integrated circuits.	IET Circuits Devices Syst.	2019	DBLP DOI BibTeX RDF
23	Shikhar Gupta, Ashutosh Nandi	Effect of air spacer in underlap GAA nanowire: an analogue/RF perspective.	IET Circuits Devices Syst.	2019	DBLP DOI BibTeX RDF
23	Chen Wu, Adrian Vaisman Chasin, Andrea Padovani, Alicja Lesniewska, Steven Demuynck, Kris Croes	Role of Defects in the Reliability of HfO2/Si-Based Spacer Dielectric Stacks for Local Interconnects.	IRPS	2019	DBLP DOI BibTeX RDF
23	Jacob P. Varghese, Avinash Nelson Asokan, Subham Khatua, P. Preetha, Sunitha Rajan	Electric Field Stress Optimization of Permittivity Graded Spacer in UHVAC Gas Insulated System.	TENCON	2019	DBLP DOI BibTeX RDF
23	Jayaram Subramanian, Parviz Famouri	Analysis of Neutral position, Magnet - Spacer of Tubular Permanent Magnet Linear generator for FPE applications.	ISIE	2019	DBLP DOI BibTeX RDF
23	Adam R. Rivers, Kyle C. Weber, Terrence G. Gardner, Shuang Liu, Shalamar D. Armstrong	ITSxpress: Software to rapidly trim internally transcribed spacer sequences with quality scores for marker gene analysis.	F1000Research	2018	DBLP DOI BibTeX RDF
23	Rajneesh Sharma, Rituraj S. Rathore, Ashwani K. Rana	Impact of High-k Spacer on Device Performance of Nanoscale Underlap Fully Depleted SOI MOSFET.	J. Circuits Syst. Comput.	2018	DBLP DOI BibTeX RDF
23	Monica Santamaria, Bruno Fosso, Flavio Licciulli, Bachir Balech, Ilaria Larini, Giorgio Grillo, Giorgio De Caro, Sabino Liuni, Graziano Pesole	ITSoneDB: a comprehensive collection of eukaryotic ribosomal RNA Internal Transcribed Spacer 1 (ITS1) sequences.	Nucleic Acids Res.	2018	DBLP DOI BibTeX RDF
23	Kalyan Biswas, Angsuman Sarkar, Chandan Kumar Sarkar	Spacer engineering for performance enhancement of junctionless accumulation-mode bulk FinFETs.	IET Circuits Devices Syst.	2017	DBLP DOI BibTeX RDF
23	Gaurav Saini, Sudhanshu Choudhary	Improving the subthreshold performance of junctionless transistor using spacer engineering.	Microelectron. J.	2017	DBLP DOI BibTeX RDF
23	Hong He, Congji Li, Xiaoqin Li, Zegang Wang, Peng Xu	Development of Control System for the Assembly Equipments of Spacer Bar Based on PLC.	ICIRA (3)	2017	DBLP DOI BibTeX RDF
23	D. H. Triyoso, G. R. Mulfinger, K. Hempel, H. Tao, F. Koehler, L. Kang, A. Kumar, T. McArdle, J. Holt, A. L. Child, S. Straub, F. Ludwig, Z. Chen, J. Kluth, Rick Carter	Characterization of atomic layer deposited low-k spacer for FDSOI high-k metal gate transistor.	ICICDT	2017	DBLP DOI BibTeX RDF
23	B. Vandana, Jitendra Kumar Das, S. K. Mohapatra, Brajesh Kumar Kaushik	Effectiveness of High Permittivity Spacer for Underlap Regions of Wavy-Junctionless FinFET at 22 nm Node and Scaling Short Channel Effects.	VDAT	2017	DBLP DOI BibTeX RDF
23	Kumar Prasannajit Pradhan, Prasanna Kumar Sahu	Benefits of asymmetric underlap dual-k spacer hybrid fin field-effect transistor over bulk fin field-effect transistor.	IET Circuits Devices Syst.	2016	DBLP DOI BibTeX RDF
23	Arvind Gautam, A. Bhargavi Rani, Miguel A. Callejas, Swati Ghosh Acharyya, Amit Acharyya, Dwaipayan Biswas, Vasundhra Bhandari, Paresh Sharma, Ganesh R. Naik	Shape memory alloy smart knee spacer to enhance knee functionality: Model design and finite element analysis.	EMBC	2016	DBLP DOI BibTeX RDF
23	Jean Pierre T. Habimana, Francis Sabado, Jia Di	Multi-threshold dual-spacer dual-rail delay-insensitive logic: An improved IC design methodology for side channel attack mitigation.	ISCAS	2016	DBLP DOI BibTeX RDF
23	Young Jun Yoon, Jae Hwa Seo, Ra Hee Kwon, Young In Jang, In Man Kang	InGaAs-based junctionless transistor with dual-spacer dielectric for low power loss and high frequency mobile network system.	ICOIN	2016	DBLP DOI BibTeX RDF
23	Nandakishor Yadav, Ankur Beohar, Santosh Kumar Vishvakarma	Analysis of Single-Trap-Induced Random Telegraph Noise on Asymmetric High-k Spacer FinFET.	iNIS	2016	DBLP DOI BibTeX RDF
23	Joséphine Abi-Ghanem, Sergey A. Samsonov, M. Teresa Pisabarro	Insights into the preferential order of strand exchange in the Cre/loxP recombinase system: impact of the DNA spacer flanking sequence and flexibility.	J. Comput. Aided Mol. Des.	2015	DBLP DOI BibTeX RDF
23	Ning Zhou, Meng Yuan, Dongsheng Li, Deren Yang	Silver nanoshells plasmonically controlled random lasing without dielectric spacer.	ICTON	2015	DBLP DOI BibTeX RDF
23	Shao-Yun Fang, Yi-Shu Tai, Yao-Wen Chang	Layout decomposition for Spacer-is-Metal (SIM) self-aligned double patterning.	ASP-DAC	2015	DBLP DOI BibTeX RDF
23	Pankaj Kumar Pal, Brajesh Kumar Kaushik, B. Anand, S. Dasgupta	A comparative analysis of symmetric and asymmetric dual-k spacer FinFETs from device and circuit perspectives.	ISQED	2015	DBLP DOI BibTeX RDF
23	Yixiao Ding, Chris C. N. Chu, Wai-Kei Mak	Detailed routing for spacer-is-metal type self-aligned double/quadruple patterning lithography.	DAC	2015	DBLP DOI BibTeX RDF
23	Bahniman Ghosh, Partha Mondal, M. W. Akram, Punyasloka Bal	Impact of High- Spacer on Junctionless Transistor in Sub-Threshold Regime.	J. Low Power Electron.	2014	DBLP DOI BibTeX RDF
23	Matheus Trevisan Moreira, Guilherme Trojan, Fernando Gehm Moraes, Ney Laert Vilar Calazans	Spatially Distributed Dual-Spacer Null Convention Logic Design.	J. Low Power Electron.	2014	DBLP DOI BibTeX RDF
23	A. Yazdani, M. Normandie, M. Yousefi, M. S. Saidi, Goodarz Ahmadi	Transport and deposition of pharmaceutical particles in three commercial spacer-MDI combinations.	Comput. Biol. Medicine	2014	DBLP DOI BibTeX RDF
23	Arka Dutta, Kalyan Koley, Chandan Kumar Sarkar	Analysis of Harmonic distortion in asymmetric underlap DG-MOSFET with high-k spacer.	Microelectron. Reliab.	2014	DBLP DOI BibTeX RDF
23	Frederic Monsieur, Y. Denis, Denis Rideau, V. Quenette, Gilles Gouget, Clément Tavernier, Hervé Jaouen, Gérard Ghibaudo, Joris Lacord	The importance of the spacer region to explain short channels mobility collapse in 28nm Bulk and FDSOI technologies.	ESSDERC	2014	DBLP DOI BibTeX RDF
23	Dilsukh Nehra, Pankaj Kumar Pal, Brajesh Kumar Kaushik, S. Dasgupta	High permittivity spacer effects on junctionless FinFET based circuit/SRAM applications.	VDAT	2014	DBLP DOI BibTeX RDF
23	Alexander Goncearenco, Simon Mitternacht, Taipang Yong, Birgit Eisenhaber, Frank Eisenhaber, Igor N. Berezovsky	SPACER: server for predicting allosteric communication and effects of regulation.	Nucleic Acids Res.	2013	DBLP DOI BibTeX RDF
23	Washington Cilio, Michael Linder, Chris Porter, Jia Di, Dale R. Thompson, Scott C. Smith	Mitigating power- and timing-based side-channel attacks using dual-spacer dual-rail delay-insensitive asynchronous logic.	Microelectron. J.	2013	DBLP DOI BibTeX RDF
23	Dina H. Triyoso, Klaus Hempel, Susanne Ohsiek, Jeff Shu, Jamie K. Schaeffer, Markus Lenski	Impact of precursors choice on characteristics of PEALD SiN for spacer applications.	ICICDT	2013	DBLP DOI BibTeX RDF
23	Yuelin Du, Qiang Ma 0002, Hua Song, James P. Shiely, Gerard Luk-Pat, Alexander Miloslavsky, Martin D. F. Wong	Spacer-is-dielectric-compliant detailed routing for self-aligned double patterning lithography.	DAC	2013	DBLP DOI BibTeX RDF
23	Giap Nguyen	Courbes remplissant l'espace et leur application en traitement d'images. (Spacer-filling curves and their application in image processing).		2013	RDF
23	Siriporn Jungsuttiwong, Thanisorn Yakhanthip, Yaowarat Surakhot, Janeeya Khunchalee, Taweesak Sudyoadsuk, Vinich Promarak, Nawee Kungwan, Supawadee Namuangruk	The effect of conjugated spacer on novel carbazole derivatives for dye-sensitized solar cells: Density functional theory/time-dependent density functional theory study.	J. Comput. Chem.	2012	DBLP DOI BibTeX RDF
23	Ashutosh Nandi, Ashok K. Saxena, Sudeb Dasgupta	Impact of dual-k spacer on analog performance of underlap FinFET.	Microelectron. J.	2012	DBLP DOI BibTeX RDF
23	Kohei Fujii, Toshikazu Onishi, Koji Sonoda, Takayuki Fujita, Kensuke Kanda, Kohei Higuchi, Kazusuke Maenaka	Development of Electret Energy Harvester with Micro Spacer.	ICETET	2012	DBLP DOI BibTeX RDF
23	D. H. Triyoso, V. Jaschke, Jeff Shu, S. Mutas, Klaus Hempel, Jamie K. Schaeffer, Markus Lenski	Robust PEALD SiN spacer for gate first high-k metal gate integration.	ICICDT	2012	DBLP DOI BibTeX RDF
23	Ashutosh Nandi, Ashok K. Saxena, Sudeb Dasgupta	Analog Performance Analysis of Dual-k Spacer Based Underlap FinFET.	VDAT	2012	DBLP DOI BibTeX RDF
23	Remi Kawakami, Satoshi Niiyama, Yutaka Nakagawa, Yuji Soda	Improvement of Display Performance for PSVA-LCD Based on Novel RM Monomer with Short Alkyl Spacer.	IEICE Trans. Electron.	2011	DBLP DOI BibTeX RDF
23	Alexander Bujotzek, Min Shan, Rainer Haag, Marcus Weber	Towards a rational spacer design for bivalent inhibition of estrogen receptor.	J. Comput. Aided Mol. Des.	2011	DBLP DOI BibTeX RDF
23	Chang Liu, Dong Liang, Ting Gao, Xiaohui Pang, Jingyuan Song, Hui Yao, Jianping Han, Zhihua Liu, Xiaojun Guan, Kun Jiang, Huan Li 0001, Shilin Chen	PTIGS-IdIt, a system for species identification by DNA sequences of the psbA-trnH intergenic spacer region.	BMC Bioinform.	2011	DBLP DOI BibTeX RDF
23	Ashwani K. Rana, Narottam Chand, Vinod Kapoor	Modeling gate Current for nano Scale MOSFET with Different gate spacer.	J. Circuits Syst. Comput.	2011	DBLP DOI BibTeX RDF
23	Zi Fan, Shuying Hao, Kuntao Zhou, Qichang Zhang	Effect of Interphase Composite Spacer on Transmission Line Galloping Control.	ICDMA	2011	DBLP DOI BibTeX RDF
23	Yongchan Ban, Kevin Lucas, David Z. Pan	Flexible 2D layout decomposition framework for spacer-type double pattering lithography.	DAC	2011	DBLP DOI BibTeX RDF
23	Jinook Kim, Tae-Joon Song, Ju Hyuk Kim, Seong-Pil Cho, Myoung Su Yang, In-Byeong Kang, Yong Kee Hwang, In-Jae Chung	Formation of the overcoat layer and column spacer for TFT-LCD using capillary force lithography.	Displays	2010	DBLP DOI BibTeX RDF
23	Knut Großmann, Andreas Mühl, Michael Löser, Chokri Cherif, Gerald Hoffmann, Ahmet Refah Torun	New solutions for the manufacturing of spacer preforms for thermoplastic textile-reinforced lightweight structures.	Prod. Eng.	2010	DBLP DOI BibTeX RDF
23	Chun-Yu Wu, Ta-Chuan Liao, Ming-H Yu, Sheng-Kai Chen, Chung-Min Tsai, Huang-Chung Cheng	Field enhancement of omega-shaped-gated poly-Si TFT SONOS memory fabricated by a simple sidewall spacer formation.	Microelectron. Reliab.	2010	DBLP DOI BibTeX RDF
23	Chun-Jen Weng	Feasible approach for processes integration of CMOS transistor gate/side-wall spacer patterning fabrication.	Microelectron. Reliab.	2010	DBLP DOI BibTeX RDF
23	David J. Jeffries, Neil Abernethy, Bouke C. de Jong	Supervised learning for the automated transcription of spacer classification from spoligotype films.	BMC Bioinform.	2009	DBLP DOI BibTeX RDF