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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 41568 occurrences of 12452 keywords
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Results
Found 61775 publication records. Showing 61772 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
31 | Keivan Navi, Daniel Etiemble |
From Multi-Valued Current Mode CMOS Circuits to Efficient Voltage Mode CMOS Arithmetic Operators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 25th IEEE International Symposium on Multiple-Valued Logic, ISMVL 1995, Bloomington, Indiana, USA, May 23-25, 1995, Proceedings, pp. 58-63, 1995, IEEE Computer Society, 0-8186-7118-1. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
multivalued current mode CMOS circuits, voltage mode CMOS arithmetic operators, 3-valued current mode CMOS 2-input BSC adder, CMOS binary 4-2 counter, 1-digit Avizienis-like adder, adders, CMOS integrated circuits, integrated logic circuits, multivalued logic circuits, ternary logic, redundant number representation |
30 | Maged Marghany, Mazlan Hashim, Arthur P. Cracknell |
Volterra Algorithm for Modelling Sea Surface Current Circulation from Satellite Altimetry Data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCSA (2) ![In: Computational Science and Its Applications - ICCSA 2008, International Conference, Perugia, Italy, June 30 - July 3, 2008, Proceedings, Part II, pp. 119-128, 2008, Springer, 978-3-540-69840-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
JASON-1 satellite altimetry data, Volterra model, Lax-Wendorff schemes, Sea surface current, Finite element model |
30 | Dennis J. Ciplickas, Ronald A. Rohrer |
Expected current distributions for CMOS circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1996, San Jose, CA, USA, November 10-14, 1996, pp. 589-592, 1996, IEEE Computer Society / ACM, 0-8186-7597-7. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
switching current, expected waveform, mean estimation, static analysis, statistical analysis, CMOS, autocorrelation, random processes, power spectral density |
30 | G. G. Somjen, H. Kager, Wytse J. Wadman |
Calcium sensitive non-selective cation current promotes seizure-like discharges and spreading depression in a model neuron. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Neurosci. ![In: J. Comput. Neurosci. 26(1), pp. 139-147, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Calcium depletion, Calcium dependent current, Non-specific cation current, Seizure mechanisms, Spreading depression, Epilepsy |
30 | Mustafa Altun, Hakan Kuntman |
High CMRR current mode operational amplifier with a novel class AB input stage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007, pp. 192-195, 2007, ACM, 978-1-59593-605-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
current-mode operational amplifier, current-mode circuits |
30 | Yu-Yau Guo, Jien-Chung Lo |
Challenges of Built-In Current Sensor Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 13th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '98), 2-4 November 1998, Austin, TX, USA, Proceedings, pp. 192-, 1998, IEEE Computer Society, 0-8186-8832-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
voltage regulator, built-in current sensor, Current testing, decoupling capacitor |
30 | Adriano M. Pereira, Tales Cleber Pimenta, Robson L. Moreno, Edgar Charry R., Alberto M. Jorge |
Design of a Measurement and Interface Integrated Circuit for Characterization of Switched Current Memory Cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 11th International Conference on VLSI Design (VLSI Design 1991), 4-7 January 1998, Chennai, India, pp. 240-243, 1998, IEEE Computer Society, 0-8186-8224-8. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
switched current, behaviour simulation, voltage-to-current converter |
30 | Josep Rius 0001, Joan Figueras |
Dynamic characterization of Built-In Current Sensors based on PN junctions: Analysis and experiments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 9(3), pp. 295-310, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
I DDQ testability, Built-in Current Sensors, current testing |
30 | Shyang-Tai Su, Rafic Z. Makki, H. Troy Nagle |
Transient power supply current monitoring - A new test method for CMOS VLSI circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 6(1), pp. 23-43, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
Design for current-testability, drain/source opens, floating gates, shorts, transient power supply current |
30 | A. K. Jain, Mostafa I. H. Abd-El-Barr, R. J. Bolton |
Current-Mode CMOS Multiple-Valued Logic Function Realization Using a Direct Cover Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 25th IEEE International Symposium on Multiple-Valued Logic, ISMVL 1995, Bloomington, Indiana, USA, May 23-25, 1995, Proceedings, pp. 216-221, 1995, IEEE Computer Society, 0-8186-7118-1. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
current-mode CMOS multiple-valued logic function realization, heuristic based programs, sum of product form expression, HAMLET, Gold heuristic, current mode CMOS, multiple valued logic function realization, direct cover algorithm, logic design, random sample, multivalued logic, CMOS logic circuits, heuristic programming, MVL function |
29 | André Mansano, Andre Vilas Boas, Alfredo Olmos, Jefferson Soldera |
Zero quiescent current startup circuit with automatic turning-off for low power current and voltage reference. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, SBCCI 2009, Natal, Brazil, August 31 - September 3, 2009, 2009, ACM, 978-1-60558-705-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
power-up, starter, initialization, start-up, current reference |
29 | Srinivas Bodapati, Farid N. Najm |
High-level current macro-model for power-grid analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 39th Design Automation Conference, DAC 2002, New Orleans, LA, USA, June 10-14, 2002, pp. 385-390, 2002, ACM, 1-58113-461-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
current macro-model, DCT, power grid |
29 | Annie A. M. Cuyt, Walter Krämer, Wolfram Luther, Peter W. Markstein |
08021 Summary - Numerical Validation in Current Hardware Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Numerical Validation in Current Hardware Architectures ![In: Numerical Validation in Current Hardware Architectures, 6.1. - 11.1.2008, 2008, Internationales Begegnungs- und Forschungszentrum für Informatik (IBFI), Schloss Dagstuhl, Germany. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP BibTeX RDF |
|
29 | Wolfram Luther, Annie A. M. Cuyt, Walter Krämer, Peter W. Markstein |
08021 Abstracts Collection - Numerical Validation in Current Hardware Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Numerical Validation in Current Hardware Architectures ![In: Numerical Validation in Current Hardware Architectures, 6.1. - 11.1.2008, 2008, Internationales Begegnungs- und Forschungszentrum für Informatik (IBFI), Schloss Dagstuhl, Germany. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP BibTeX RDF |
|
29 | Amir Pnueli |
Applications of Temporal Logic to the Specification and Verification of Reactive Systems: A Survey of Current Trends. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Current Trends in Concurrency ![In: Current Trends in Concurrency, Overviews and Tutorials, pp. 510-584, 1986, Springer, 3-540-16488-X. The full citation details ...](Pics/full.jpeg) |
1986 |
DBLP DOI BibTeX RDF |
|
29 | Youngsoo Shin, Sewan Heo, Hyung-Ock Kim, Jung Yun Choi |
Simultaneous Control of Subthreshold and Gate Leakage Current in Nanometer-Scale CMOS Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 654-659, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
gate leakage current, nanometer-scale CMOS circuits, supply switching, ground collapse, standard-cell elements, 45 nm, 65 nm, power gating, subthreshold leakage current, 90 nm |
29 | John Johansen, Uday S. Karmarkar, Dhananjay Nanda, Abraham Seidmann |
Business experience with computer integrated manufacturing. A survey of current strategy and practice. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS (4) ![In: 28th Annual Hawaii International Conference on System Sciences (HICSS-28), January 3-6, 1995, Kihei, Maui, Hawaii, USA, pp. 970-979, 1995, IEEE Computer Society, 0-8186-6945-4. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
current strategy, current practice, business experience, US manufacturing firms, adoption policy, manufacturing process characteristics, CIM development process, CIM architecture, plant-wide integration, competitive missions, information technologies, value, strategic planning, computer integrated manufacturing, computer integrated manufacturing, benefits, temporal pattern, commerce |
29 | Shoji Kawahito, Makoto Ishida, Tetsuro Nakamura, Michitaka Kameyama, Tatsuo Higuchi 0001 |
High-Speed Area-Efficient Multiplier Design Using Multiple-Valued Current-Mode Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 43(1), pp. 34-42, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
multiple-valued current-mode circuits, high-speed multiplier, carry-propagation-free addition trees, multiple-valued current-mode, carry-propagation-free addition, area efficient design, VLSI, VLSI, tree structure, multiplying circuits, redundant number representations, number representations, multiplier design |
29 | Takeshi Yamakawa, Tsutomu Miki |
The Current Mode Fuzzy Logic Integrated Circuits Fabricated by the Standard CMOS Process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 35(2), pp. 161-167, 1986. The full citation details ...](Pics/full.jpeg) |
1986 |
DBLP DOI BibTeX RDF |
semicustom IC, fuzzy computer, fuzzy integrated circuit, fuzzy logic array, fuzzy logic building block, MOS current mirror, ratioless circuit, Current mode circuit |
28 | Srdjan Dragic, Martin Margala |
A 1.2V Built-In Architecture for High Frequency On-Line Iddq/delta Iddq Test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2002 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2002), 25-26 April 2002, Pittsburgh, PA, USA, pp. 165-170, 2002, IEEE Computer Society, 0-7695-1486-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Current Amplifier, On-Line Testing, Iddq, delta Iddq, Current Monitoring |
28 | Manoj Sachdev |
SeparateIDDQ testing of signal and bias paths in CMOS ICs for defect diagnosis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 8(2), pp. 203-214, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
junction leakage current, diagnostics, deep sub-micron, I DDQ testing, subthreshold leakage current |
27 | Radu Muresan, Catherine H. Gebotys |
Current flattening in software and hardware for security applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2004, Stockholm, Sweden, September 8-10, 2004, pp. 218-223, 2004, ACM, 1-58113-937-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
current flattening, hardware architecture, power analysis attacks |
27 | Fei Li 0003, Lei He 0001, Kewal K. Saluja |
Estimation of Maximum Power-Up Current. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC/VLSI Design ![In: Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), and the 15th International Conference on VLSI Design (VLSI Design 2002), Bangalore, India, January 7-11, 2002, pp. 51-, 2002, IEEE Computer Society, 0-7695-1299-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
current estimation, ATPG algorithm, leakage reduction |
27 | Chintan Patel, Abhishek Singh 0001, Jim Plusquellic |
Defect Detection Using Quiescent Signal Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 21(5), pp. 463-483, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
multiple current measurements, Quiescent Signal Analysis, IDDQ, current testing, defect-based testing, parametric testing |
27 | Sagar S. Sabade, D. M. H. Walker |
Use of Multiple IDDQ Test Metrics for Outlier Identification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 21st IEEE VLSI Test Symposium (VTS 2003), 27 April - 1 May 2003, Napa Valley, CA, USA, pp. 31-38, 2003, IEEE Computer Society, 0-7695-1924-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Current ratio, neighbor current ratio, outlier identification, spatial correlation, IDDQ testing |
27 | Tsukasa Ike, Takahiro Hanyu, Michitaka Kameyama |
Fully Source-Coupled Logic Based Multiple-Valued VLSI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 32nd IEEE International Symposium on Multiple-Valued Logic (ISMVL 2002), May 15-18, 2002, Boston, Massachusetts, USA, pp. 270-275, 2002, IEEE Computer Society, 0-7695-1462-6. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
source-coupled logic, differential-pair circuit, current-source control, radix-2 signed-digit adder, multiple-valued logic, current-mode logic |
27 | Mengmeng Du, Hoi Lee |
A 2.5MHz, 97%-accuracy on-chip current sensor with dynamically-biased shunt feedback for current-mode switching DC-DC converters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA, pp. 3274-3277, 2008, IEEE, 978-1-4244-1683-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
26 | Qadeer Ahmad Khan, Sanjay Kumar Wadhwa, Kulbhushan Misri |
Low power startup circuits for voltage and current reference with zero steady state current. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003, Seoul, Korea, August 25-27, 2003, pp. 184-188, 2003, ACM, 1-58113-682-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
low power integrated circuits, startup circuit, voltage reference, current reference |
26 | Jader A. De Lima, Wallace A. Pimenta |
A current limiter for DC/DC regulators with internal compensation for process and temperature. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2008, Gramado, Brazil, September 1-4, 2008, pp. 94-99, 2008, ACM, 978-1-60558-231-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
DC/DC converter, LDO, PVT compensation, current limitation, switcher |
26 | Jiri Misurec |
Non-linear circuits with CCII+/-current conveyors. (PDF / PS) ![Search on Bibsonomy](Pics/bibsonomy.png) |
PWC ![In: Personal Wireless Communications, The 12th IFIP International Conference on Personal Wireless Communications (PWC 2007), Prague, Czech Republic, September 2007, pp. 616-627, 2007, Springer, 978-0-387-74158-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
current conveyor, non-linear circuits, rectifiers |
26 | Geoffrey C.-F. Yeap |
Leakage current in low standby power and high performance devices: trends and challenges. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of 2002 International Symposium on Physical Design, ISPD 2002, Del Mar, CA, USA, April 7-10, 2002, pp. 22-27, 2002, ACM, 1-58113-460-6. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
gate tunneling leakage, low standby power, off-state sub-threshold leakage, system-on-a-ship (SoC), high performance, CMOS technology, leakage current |
26 | Thorsten Adler, Hiltrud Brocke, Lars Hedrich, Erich Barke |
A current driven routing and verification methodology for analog applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 37th Conference on Design Automation, Los Angeles, CA, USA, June 5-9, 2000., pp. 385-389, 2000, ACM. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
multiterminal signal nets, routing, verification, design methodology, Steiner tree, electromigration, current density |
26 | Javier Argüelles, Salvador Bracho |
Signature analysis for fault detection of mixed-signal ICs based on dynamic power-supply current. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 9(1-2), pp. 89-107, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
mixed-signal IC testing, design for test in mixed-signal IC, built-in current sensors |
26 | Teruhiko Yamada, Tsuyoshi Sasaki |
On Current Testing of Josephson Logic Circuits Using the 4JL Gate Family. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 5th Asian Test Symposium (ATS '96), November 20-22, 1996, Hsinchu, Taiwan, pp. 189-, 1996, IEEE Computer Society, 0-8186-7478-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
4JL gate, Josephson logic circuit, current testing, defect coverage |
26 | Anne E. Gattiker, Wojciech Maly |
Current signatures [VLSI circuit testing]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 14th IEEE VLSI Test Symposium (VTS'96), April 28 - May 1, 1996, Princeton, NJ, USA, pp. 112-117, 1996, IEEE Computer Society, 0-8186-7304-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
VLSI circuit testing, current signature, passive defects, active defects, VLSI, integrated circuit testing, CMOS integrated circuits, I/sub DDQ/ testing |
25 | Liang Zhang 0038, John M. Wilson 0002, Rizwan Bashirullah, Lei Luo 0006, Jian Xu, Paul D. Franzon |
Driver pre-emphasis techniques for on-chip global buses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005, San Diego, California, USA, August 8-10, 2005, pp. 186-191, 2005, ACM, 1-59593-137-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
current sensing, peak current, pre-emphasis, low-power, crosstalk, differential, on-chip bus |
25 | Nikhil Jayakumar, Sunil P. Khatri |
An ASIC design methodology with predictably low leakage, using leakage-immune standard cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003, Seoul, Korea, August 25-27, 2003, pp. 128-133, 2003, ACM, 1-58113-682-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
standby current, leakage current, standard cells, MTCMOS |
25 | Hans A. R. Manhaeve, Stefaan Kerckenaere |
An On-Chip Detection Circuit for the Verification of IC Supply Connections. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2001), 24-26 October 2001, San Francisco, CA, USA, Proceedings, pp. 57-65, 2001, IEEE Computer Society, 0-7695-1203-8. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
IC connections, connection verification, supply current measurements, on-chip monitor, reliability, DFT, CMOS, Scan, Boundary Scan, IP core, Current monitor |
25 | Takahiro Hanyu, Akira Mochizuki, Michitaka Kameyama |
Multiple-Valued Arithmetic Integrated Circuits Based on 1.5V-Supply Dual-Rail Source-Coupled Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 25th IEEE International Symposium on Multiple-Valued Logic, ISMVL 1995, Bloomington, Indiana, USA, May 23-25, 1995, Proceedings, pp. 64-71, 1995, IEEE Computer Society, 0-8186-7118-1. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
multiple-valued arithmetic integrated circuits, dual-rail source-coupled logic, multiple-valued current-mode MOS integrated circuit, high-speed arithmetic systems, multiple-valued source-coupled logic circuit, dual-rail complementary inputs, pipelined multiplier, 54 bit, 200 MHz, 0.8 mum, 1.5 V, CMOS logic circuits, multiplying circuits, multivalued logic circuits, current-mode logic, pipeline arithmetic |
25 | Claude Thibeault |
Detection and location of faults and defects using digital signal processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 13th IEEE VLSI Test Symposium (VTS'95), April 30 - May 3, 1995, Princeton, New Jersey, USA, pp. 262-269, 1995, IEEE Computer Society, 0-8186-7000-2. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
sampled current, sampled voltage, quiescent current, parasitic resistive contacts, DSP technique, fault diagnosis, logic testing, integrated circuit testing, fault detection, diagnosis, signal processing, digital signal processing, fault location, fault location, defects, digital integrated circuits, test method |
25 | Seong-Kweon Kim, Shigehito Saigusa, Suguru Kameda, Hiroyuki Nakase, Kazuo Tsubouchi |
New current attenuator circuit in the current mode FFT LSI for OFDM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS (1) ![In: IEEE Asia Pacific Conference on Circuits and Systems 2002, APCCAS 2002, Singapore, 16-18 December 2002, pp. 225-228, 2002, IEEE, 0-7803-7690-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
24 | Wei Wang, Yu Hu 0001, Yinhe Han 0001, Xiaowei Li 0001, You-Sheng Zhang |
Leakage Current Optimization Techniques During Test Based on Don't Care Bits Assignment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Sci. Technol. ![In: J. Comput. Sci. Technol. 22(5), pp. 673-680, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
don’t care bits, minimum leakage vector, leakage power, leakage current |
24 | Michael D. Powell, T. N. Vijaykumar |
Pipeline muffling and a priori current ramping: architectural techniques to reduce high-frequency inductive noise. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003, Seoul, Korea, August 25-27, 2003, pp. 223-228, 2003, ACM, 1-58113-682-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
a priori current ramping, pipeline muffling, leakage, decoupling capacitors, inductive noise |
24 | Rajeev R. Rao, Ashish Srivastava, David T. Blaauw, Dennis Sylvester |
Statistical estimation of leakage current considering inter- and intra-die process variation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003, Seoul, Korea, August 25-27, 2003, pp. 84-89, 2003, ACM, 1-58113-682-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
variability, Monte Carlo, leakage current |
24 | Montree Kumngern, Fabian Khateb, Tomasz Kulej, Martin Kyselak, Somkiat Lerkvaranyu, Boonying Knobnob |
Current-Mode Shadow Filter with Single-Input Multiple-Output Using Current-Controlled Current Conveyors with Controlled Current Gain. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sensors ![In: Sensors 24(2), pp. 460, January 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
24 | Mahdi Jalili-Kharaajoo |
Design of a Speed Drive Based on Fuzzy Logic for a Dual Three-Phase Induction Motor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Rough Sets and Current Trends in Computing ![In: Rough Sets and Current Trends in Computing, 4th International Conference, RSCTC 2004, Uppsala, Sweden, June 1-5, 2004, Proceedings, pp. 334-339, 2004, Springer, 3-540-22117-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
24 | Zbigniew Suraj, Piotr Grochowalski |
The Rough Set Database System: An Overview. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Rough Sets and Current Trends in Computing ![In: Rough Sets and Current Trends in Computing, 4th International Conference, RSCTC 2004, Uppsala, Sweden, June 1-5, 2004, Proceedings, pp. 841-849, 2004, Springer, 3-540-22117-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
data mining, neural networks, machine learning, pattern recognition, rough sets, evolutionary computing, knowledge discovery, database systems, fuzzy systems |
24 | Witold R. Rudnicki, Henryk Jan Komorowski |
Feature Synthesis and Extraction for the Construction of Generalized Properties of Amino Acids. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Rough Sets and Current Trends in Computing ![In: Rough Sets and Current Trends in Computing, 4th International Conference, RSCTC 2004, Uppsala, Sweden, June 1-5, 2004, Proceedings, pp. 786-791, 2004, Springer, 3-540-22117-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
24 | Arkadiusz Wojna |
Constraint Based Incremental Learning of Classification Rules. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Rough Sets and Current Trends in Computing ![In: Rough Sets and Current Trends in Computing, Second International Conference, RSCTC 2000 Banff, Canada, October 16-19, 2000, Revised Papers, pp. 428-435, 2000, Springer, 3-540-43074-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
machine learning, rough sets, incremental learning, decision algorithms |
24 | Wojciech Ziarko |
Rough Sets: Trends, Challenges, and Prospects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Rough Sets and Current Trends in Computing ![In: Rough Sets and Current Trends in Computing, Second International Conference, RSCTC 2000 Banff, Canada, October 16-19, 2000, Revised Papers, pp. 1-7, 2000, Springer, 3-540-43074-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
24 | Tom R. Burns, Anna Gomolinska |
Modelling Social Game Systems by Rule Complexes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Rough Sets and Current Trends in Computing ![In: Rough Sets and Current Trends in Computing, First International Conference, RSCTC'98, Warsaw, Poland, June 22-26, 1998, Proceedings, pp. 581-584, 1998, Springer, 3-540-64655-8. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
24 | Kyung Ki Kim, Yong-Bin Kim, Minsu Choi, Nohpill Park |
Leakage Minimization Technique for Nanoscale CMOS VLSI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 24(4), pp. 322-330, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
nanometer CMOS, cell characterization, gate-tunneling current, input pattern generation, leakage power, subthreshold leakage current |
24 | Mohammad M. Ahmadi, Reza Lotfi |
A new architecture for rail-to-rail input constant-gm CMOS operational transconductance amplifiers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003, Seoul, Korea, August 25-27, 2003, pp. 353-358, 2003, ACM, 1-58113-682-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
current summation, floating current source, input stage, rail-to-rail, transconductance, operational transconductance amplifier |
24 | Mallika De, Bhabani P. Sinha |
Testing of a parallel ternary multiplier using I2L logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 4th Asian Test Symposium (ATS '95), November 23-24, 1995. Bangalore, India, pp. 387-, 1995, IEEE Computer Society, 0-8186-7129-7. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
integrated injection logic, parallel ternary multiplier, I/sup 2/L logic, multivalued I/sup 2/L circuits, input balanced ternary full adder, precarry generator, multivalued current inputs, multivalued current outputs, generated test sets, skew fault, fault diagnosis, logic testing, design for testability, logic design, digital arithmetic, fault location, stuck-at fault, generalized model, adders, adder, multiplying circuits, multivalued logic circuits, test sets, parallel multiplier |
24 | Walter W. Weber, Adit D. Singh |
An experimental evaluation of the differential BICS for IDDQ testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 13th IEEE VLSI Test Symposium (VTS'95), April 30 - May 3, 1995, Princeton, New Jersey, USA, pp. 472-485, 1995, IEEE Computer Society, 0-8186-7000-2. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
differential BICS, CMOS test chips, inter-layer shorts, intra-layer shorts, fault diagnosis, integrated circuit testing, fault coverage, CMOS integrated circuits, opens, built-in current sensor, IC testing, I/sub DDQ/ testing, electric current measurement, electric sensing devices |
23 | P. V. Ratna Kumar, Kaushik Bhattacharyya, Tamal Das, Pradip Mandal |
Improvement of power efficiency in switched capacitor DC-DC converter by shoot-through current elimination. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009, San Fancisco, CA, USA, August 19-21, 2009, pp. 81-86, 2009, ACM, 978-1-60558-684-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
shoot-through current, switched capacitor converter, time interleaving |
23 | Vikas Kaushal, Quentin Diduck, Martin Margala |
Study of leakage current mechanisms in ballistic deflection transistors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, Boston Area, MA, USA, May 10-12 2009, pp. 165-168, 2009, ACM, 978-1-60558-522-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
ballistic transport, current leakage mechanism, deflection transistors, silvaco simulation, geometry, monte carlo simulation |
23 | Taufik, Makbul Anwari |
Modeling and Simulation of Current Ripple in DC Link Connecting Two PWM Inverters Using Matlab/Simulink. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia International Conference on Modelling and Simulation ![In: Second Asia International Conference on Modelling and Simulation, AMS 2008, Kuala Lumpur, Malaysia, May 13-15, 2008, pp. 1029-1033, 2008, IEEE Computer Society, 978-0-7695-3136-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
DC bus Current Ripple, PWM Inverter |
23 | Tsung-Yi Wu, Jr-Luen Tzeng, Kuang-Yao Chen |
A Fast Probability-Based Algorithm for Leakage Current Reduction Considering Controller Cost. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 672-677, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
MLV controller, probability-based algorithm, leakage current reduction, minimum leakage vector |
23 | Zhiyuan Cai, Shaohua Ma, Yangyang Ge, Erzhi Wang |
Time Series Prediction of Short Circuit Current for Synchronous Control of Synthetic Test Based on Delay Coordinate Embedding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIC (3) ![In: Advanced Intelligent Computing Theories and Applications. With Aspects of Contemporary Intelligent Computing Techniques, Third International Conference on Intelligent Computing, ICIC 2007, Qingdao, China, August 21-24, 2007. Proceedings, pp. 714-721, 2007, Springer, 978-3-540-74281-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
short circuit current, synthetic test, time series prediction, synchronous control |
23 | Stephen C. Terry, Mohammad M. Mojarradi, Benjamin J. Blalock, Jesse A. Richmond |
Adaptive gate biasing: a new solution for body-driven current mirrors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, Chicago, Illinois, USA, April 17-19, 2005, pp. 472-477, 2005, ACM, 1-59593-057-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
SOI analog, body driving, current mirrors, ultra-low-voltage analog circuit design |
23 | Sudhakar Bobba, Ibrahim N. Hajj |
Maximum Current Estimation in Programmable Logic Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 19-21 February 1998, Lafayette, LA, USA, pp. 301-306, 1998, IEEE Computer Society, 0-8186-8409-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
maximum current, PLA |
23 | Claude Thibeault |
Increasing Current Testing Resolution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 13th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '98), 2-4 November 1998, Austin, TX, USA, Proceedings, pp. 126-134, 1998, IEEE Computer Society, 0-8186-8832-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
current signatures, test, Integrated circuits, Iddq testing |
23 | José Machado da Silva, José Silva Matos, Ian M. Bell, Gaynor E. Taylor |
Mixed current/voltage observation towards effective testing of analog and mixed-signal circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 9(1-2), pp. 75-88, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
mixed current/voltage testing, design for testability, mixed-signal testing, cross-correlation |
23 | Udo Mahlstedt, Jürgen Alt, Matthias Heinitz |
CURRENT: a test generation system for IDDQ testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 13th IEEE VLSI Test Symposium (VTS'95), April 30 - May 3, 1995, Princeton, New Jersey, USA, pp. 317-323, 1995, IEEE Computer Society, 0-8186-7000-2. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
CURRENT test system, test generation system, scan-based circuits, library-based fault modeling strategy, intra-gate shorts, inter-gate shorts, gate-drain shorts, deterministic test generator, test set compaction technique, fault diagnosis, logic testing, integrated circuit testing, automatic testing, fault simulator, fault coverage, fault location, CMOS logic circuits, bridging faults, boundary scan testing, I/sub DDQ/ testing, test application time reduction, stuck-on faults, leakage faults |
23 | Chun-Hung Chen, Jacob A. Abraham |
Generation and evaluation of current and logic tests for switch-level sequential circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 3(4), pp. 359-366, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
logic tests, test generation, Current tests, I DDQ |
23 | Hector Ouilhet |
Google Sky Map: using your phone as an interface. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Mobile HCI ![In: Proceedings of the 12th Conference on Human-Computer Interaction with Mobile Devices and Services, Mobile HCI 2010, Lisbon, Portugal, September 7-10, 2010, pp. 419-422, 2010, ACM, 978-1-60558-835-3. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
23 | Po-Yuan Chen, Chiao-Chen Fang, TingTing Hwang, Hsi-Pin Ma |
Leakage reduction, delay compensation using partition-based tunable body-biasing techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 14(4), pp. 53:1-53:22, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
low-power design, process variations, leakage current, Body biasing |
23 | Violet Ka I Pun, Volker Stolz |
Enforced Dependencies for Active Objects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Active Object Languages: Current Research Trends ![In: Active Object Languages: Current Research Trends, pp. 359-374, 2024, Springer, 978-3-031-51059-5. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
23 | Roberto Casadei, Ferruccio Damiani, Gianluca Torta, Mirko Viroli |
Actor-Based Designs for Distributed Self-organisation Programming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Active Object Languages: Current Research Trends ![In: Active Object Languages: Current Research Trends, pp. 37-58, 2024, Springer, 978-3-031-51059-5. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
23 | Chinmayi Prabhu Baramashetru, Silvia Lizeth Tapia Tarifa, Olaf Owe |
Integrating Data Privacy Compliance in Active Object Languages. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Active Object Languages: Current Research Trends ![In: Active Object Languages: Current Research Trends, pp. 263-288, 2024, Springer, 978-3-031-51059-5. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
23 | Eduard Kamburjan, Michael Lienhardt |
Type-Based Verification of Delegated Control in Hybrid Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Active Object Languages: Current Research Trends ![In: Active Object Languages: Current Research Trends, pp. 323-358, 2024, Springer, 978-3-031-51059-5. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
23 | Guido Salvaneschi, Pascal Weisenburger |
Bridging Between Active Objects: Multitier Programming for Distributed, Concurrent Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Active Object Languages: Current Research Trends ![In: Active Object Languages: Current Research Trends, pp. 92-122, 2024, Springer, 978-3-031-51059-5. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
23 | Nobuko Yoshida |
Programming Language Implementations with Multiparty Session Types. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Active Object Languages: Current Research Trends ![In: Active Object Languages: Current Research Trends, pp. 147-165, 2024, Springer, 978-3-031-51059-5. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
23 | Jonas Spenger, Paris Carbone, Philipp Haller |
A Survey of Actor-Like Programming Models for Serverless Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Active Object Languages: Current Research Trends ![In: Active Object Languages: Current Research Trends, pp. 123-146, 2024, Springer, 978-3-031-51059-5. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
23 | Reiner Hähnle, Eduard Kamburjan, Marco Scaletta |
Context-Aware Trace Contracts. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Active Object Languages: Current Research Trends ![In: Active Object Languages: Current Research Trends, pp. 289-322, 2024, Springer, 978-3-031-51059-5. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
23 | Elias Castegren, Tobias Wrigstad |
Encore: Coda. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Active Object Languages: Current Research Trends ![In: Active Object Languages: Current Research Trends, pp. 59-91, 2024, Springer, 978-3-031-51059-5. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
23 | Martin Andrieux, Ludovic Henrio, Gabriel Radanne |
Active Objects Based on Algebraic Effects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Active Object Languages: Current Research Trends ![In: Active Object Languages: Current Research Trends, pp. 3-36, 2024, Springer, 978-3-031-51059-5. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
23 | Paul Kobialka, Rudolf Schlatte, Gunnar Rye Bergersen, Einar Broch Johnsen, Silvia Lizeth Tapia Tarifa |
Simulating User Journeys with Active Objects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Active Object Languages: Current Research Trends ![In: Active Object Languages: Current Research Trends, pp. 199-225, 2024, Springer, 978-3-031-51059-5. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
23 | Lorenzo Bacchiani, Mario Bravetti, Saverio Giallorenzo, Jacopo Mauro, Gianluigi Zavattaro |
Integrated Timed Architectural Modeling/Execution Language. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Active Object Languages: Current Research Trends ![In: Active Object Languages: Current Research Trends, pp. 169-198, 2024, Springer, 978-3-031-51059-5. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
23 | Ramtin Khosravi, Ehsan Khamespanah, Fatemeh Ghassemi, Marjan Sirjani |
Actors Upgraded for Variability, Adaptability, and Determinism. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Active Object Languages: Current Research Trends ![In: Active Object Languages: Current Research Trends, pp. 226-260, 2024, Springer, 978-3-031-51059-5. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
23 | John I. Tait, Barou Diallo |
Future Patent Search. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Current Challenges in Patent Information Retrieval ![In: Current Challenges in Patent Information Retrieval, pp. 389-407, 2011, Springer, 978-3-642-19230-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
23 | Stephen Tomlinson, Bruce Hedin |
Measuring Effectiveness in the TREC Legal Track. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Current Challenges in Patent Information Retrieval ![In: Current Challenges in Patent Information Retrieval, pp. 167-180, 2011, Springer, 978-3-642-19230-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
23 | Hidetsugu Nanba, Hideaki Kamaya, Toshiyuki Takezawa, Manabu Okumura, Akihiro Shinmori, Hidekazu Tanigawa |
Automatic Translation of Scholarly Terms into Patent Terms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Current Challenges in Patent Information Retrieval ![In: Current Challenges in Patent Information Retrieval, pp. 373-388, 2011, Springer, 978-3-642-19230-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
23 | Cornelis H. A. Koster, Jean G. Beney, Suzan Verberne, Merijn Vogel |
Phrase-Based Document Categorization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Current Challenges in Patent Information Retrieval ![In: Current Challenges in Patent Information Retrieval, pp. 263-286, 2011, Springer, 978-3-642-19230-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
23 | Steffen Koch 0001, Harald Bosch |
From Static Textual Display of Patents to Graphical Interactions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Current Challenges in Patent Information Retrieval ![In: Current Challenges in Patent Information Retrieval, pp. 217-235, 2011, Springer, 978-3-642-19230-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
23 | Hany Azzam, Iraklis A. Klampanos, Thomas Roelleke |
Large-Scale Logical Retrieval: Technology for Semantic Modelling of Patent Search. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Current Challenges in Patent Information Retrieval ![In: Current Challenges in Patent Information Retrieval, pp. 181-195, 2011, Springer, 978-3-642-19230-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
23 | Richard Bache |
Measuring and Improving Access to the Corpus. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Current Challenges in Patent Information Retrieval ![In: Current Challenges in Patent Information Retrieval, pp. 147-165, 2011, Springer, 978-3-642-19230-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
23 | Veronika Stefanov, John I. Tait |
An Introduction to Contemporary Search Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Current Challenges in Patent Information Retrieval ![In: Current Challenges in Patent Information Retrieval, pp. 45-65, 2011, Springer, 978-3-642-19230-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
23 | Florina Piroi, Veronika Zenz |
Evaluating Information Retrieval in the Intellectual Property Domain: The Clef-Ip Campaign. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Current Challenges in Patent Information Retrieval ![In: Current Challenges in Patent Information Retrieval, pp. 87-108, 2011, Springer, 978-3-642-19230-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
23 | Ted Briscoe, Karl Harrison, Andrew Naish, Andy Parker, Marek Rei, Advaith Siddharthan, David Sinclair, Mark Slater, Rebecca Watson |
Intelligent Information Access from Scientific Papers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Current Challenges in Patent Information Retrieval ![In: Current Challenges in Patent Information Retrieval, pp. 329-342, 2011, Springer, 978-3-642-19230-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
23 | Christopher G. Harris 0001, Robert Arens, Padmini Srinivasan |
Using Classification Code Hierarchies for Patent Prior Art Searches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Current Challenges in Patent Information Retrieval ![In: Current Challenges in Patent Information Retrieval, pp. 287-304, 2011, Springer, 978-3-642-19230-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
23 | Hamish Cunningham, Valentin Tablan, Ian Roberts, Mark A. Greenwood, Niraj Aswani |
Information Extraction and Semantic Annotation for Multi-Paradigm Information Management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Current Challenges in Patent Information Retrieval ![In: Current Challenges in Patent Information Retrieval, pp. 307-327, 2011, Springer, 978-3-642-19230-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
23 | Ben Carterette, Ellen M. Voorhees |
Overview of Information Retrieval Evaluation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Current Challenges in Patent Information Retrieval ![In: Current Challenges in Patent Information Retrieval, pp. 69-85, 2011, Springer, 978-3-642-19230-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
23 | Andreas Pesenhofer, Helmut Berger, Michael Dittenbach |
Offering New Insights by Harmonizing Patents, Taxonomies and Linked Data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Current Challenges in Patent Information Retrieval ![In: Current Challenges in Patent Information Retrieval, pp. 357-371, 2011, Springer, 978-3-642-19230-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
23 | Mihai Lupu, Jimmy X. Huang, Jianhan Zhu |
Evaluation of Chemical Information Retrieval Tools. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Current Challenges in Patent Information Retrieval ![In: Current Challenges in Patent Information Retrieval, pp. 109-124, 2011, Springer, 978-3-642-19230-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
23 | Karim Benzineb, Jacques Guyot |
Automated Patent Classification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Current Challenges in Patent Information Retrieval ![In: Current Challenges in Patent Information Retrieval, pp. 239-261, 2011, Springer, 978-3-642-19230-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
23 | Peter Parapatics, Michael Dittenbach |
Patent Claim Decomposition for Improved Information Extraction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Current Challenges in Patent Information Retrieval ![In: Current Challenges in Patent Information Retrieval, pp. 197-216, 2011, Springer, 978-3-642-19230-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
23 | Anthony J. Trippe, Ian Ruthven |
Evaluating Real Patent Retrieval Effectiveness. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Current Challenges in Patent Information Retrieval ![In: Current Challenges in Patent Information Retrieval, pp. 125-143, 2011, Springer, 978-3-642-19230-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
23 | Doreen Alberts, Cynthia Barcelon Yang, Denise Fobare-DePonio, Ken Koubek, Suzanne Robins, Matthew Rodgers, Edlyn Simmons, Dominic DeMarco |
Introduction to Patent Searching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Current Challenges in Patent Information Retrieval ![In: Current Challenges in Patent Information Retrieval, pp. 3-43, 2011, Springer, 978-3-642-19230-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
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