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Found 14080 publication records. Showing 14080 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
90Bassem A. Alhalabi, Magdy A. Bayoumi A scalable analog architecture for neural networks with on-chip learning and refreshing. Search on Bibsonomy Great Lakes Symposium on VLSI The full citation details ... 1995 DBLP  DOI  BibTeX  RDF analogue storage, scalable analog architecture, on-chip learning, on-chip refreshing, analog storage, analog functional blocks, analog pass switches, system versatility, learning speed, local analog synaptic updating scheme, unbounded scalability, neural networks, learning (artificial intelligence), neural chips, analogue processing circuits
79Mike Brunoli, Masao Hotta, Felicia James, Rudy Koch, Roy McGuffin, Andrew J. Moore Analog intellectual property: now? Or never? Search on Bibsonomy DAC The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
79John Lowell Computer aided design for analog applications (panel session): an assessment. Search on Bibsonomy DAC The full citation details ... 1985 DBLP  DOI  BibTeX  RDF
77Thelma Estrin The UCLA Brain Research Institute data processing laboratory. Search on Bibsonomy History of Medical Informatics The full citation details ... 1987 DBLP  DOI  BibTeX  RDF
73Shekhar Borkar, Robert W. Brodersen, Jue-Hsien Chern, Eric Naviasky, D. Saias, Charles G. Sodini Tomorrow's analog: just dead or just different? Search on Bibsonomy DAC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF analog CAD tools, analog design methodologies, mixed-signal design, analog design, RF design
66Rajesh Ramadoss, Michael L. Bushnell Test generation for mixed-signal devices using signal flow graphs. Search on Bibsonomy VLSI Design The full citation details ... 1996 DBLP  DOI  BibTeX  RDF mixed-signal devices, reverse simulation approach, component tolerances, analog input sinusoids, test generation results, analog backtrace method, high-order analog circuits, fault diagnosis, test generation, integrated circuit testing, automatic testing, circuit analysis computing, mixed analogue-digital integrated circuits, signal flow graphs, signal flow graphs, nonlinear circuits
65Janusz Rzeszut, Bozena Kaminska, Yvon Savaria A new method for testing mixed analog and digital circuits. Search on Bibsonomy Asian Test Symposium The full citation details ... 1995 DBLP  DOI  BibTeX  RDF charge-coupled device circuits, mixed analog and digital circuits, analog test points, simultaneous observation, analog multiplexer, signal path, analog shift register, input voltage, integrated circuit testing, shift registers, mixed analogue-digital integrated circuits, charge coupled device, analogue processing circuits
64Anirudh Devgan, Bulent Basaran, David Colleran, Mar Hershenson Accelerated design of analog, mixed-signal circuits in Titan. Search on Bibsonomy ISPD The full citation details ... 2009 DBLP  DOI  BibTeX  RDF analog circuit layout, analog/digital, custom design, layout, physical design, analog circuits, mixed-signal circuits
64Sambuddha Bhattacharya, Nuttorn Jangkrajarng, Roy Hartono, C.-J. Richard Shi Correct-by-construction layout-centric retargeting of large analog designs. Search on Bibsonomy DAC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF analog integrated circuit design, analog layout automation, analog synthesis and optimization, layout symmetry
59Boris Murmann Digitally Assisted Analog Circuits. Search on Bibsonomy IEEE Micro The full citation details ... 2006 DBLP  DOI  BibTeX  RDF analog signals, digital computing, analog circuits, analog-to-digital converter
57Tathagato Rai Dastidar, P. P. Chakrabarti 0001 A verification system for transient response of analog circuits. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF Ana CTL, model checking, query language, Analog circuits, equivalence checking, transient response
55Eric E. Fabris, Luigi Carro, Sergio Bampi A Universal High-Performance Analog Interface for Signal Processing SOCs. Search on Bibsonomy SBCCI The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
54Salvador Mir, Marcelo Lubaszewski, Bernard Courtois Unified built-in self-test for fully differential analog circuits. Search on Bibsonomy J. Electron. Test. The full citation details ... 1996 DBLP  DOI  BibTeX  RDF on-line/off-line analog test, unified BIST, fully differential analog circuits, common-mode feedback, analog BIST
54Alexandre R. S. Romariz, P. U. A. Ferreira, J. V. Campêlo Jr., Marcio L. Graciano Jr., José C. da Costa Design of a Hybrid Digital-Analog Neural Co-Processor for Signal Processing. Search on Bibsonomy EUROMICRO The full citation details ... 1996 DBLP  DOI  BibTeX  RDF hybrid digital-analog neural co-processor, digitally-controlled multiplexing, CMOS analog circuits, VLSI, signal processing, VLSI design, multilayer perceptrons, VLSI implementation, hybrid architecture, capacitors, analog multipliers
54Rajesh Ramadoss, Michael L. Bushnell Test Generation for Mixed-Signal Devices Using Signal Flow Graphs. Search on Bibsonomy J. Electron. Test. The full citation details ... 1999 DBLP  DOI  BibTeX  RDF analog test generation, mixed-signal test generation, back tracing, parametric faults, catastrophic faults
53Stephan Ohr, Rob A. Rutenbar, Henry Chang, Georges G. E. Gielen, Rudolf Koch, Roy McGuffin, K. C. Murphy Survival strategies for mixed-signal systems-on-chip (panel session). Search on Bibsonomy DAC The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
52Hong Helena Zheng, Ashok Balivada, Jacob A. Abraham A novel test generation approach for parametric faults in linear analog circuits . Search on Bibsonomy VTS The full citation details ... 1996 DBLP  DOI  BibTeX  RDF digital test software, time-domain tests, equivalent digital circuit, digital test vectors, test waveform, VLSI, test generation, integrated circuit testing, fault location, stuck-at faults, analogue integrated circuits, parametric faults, linear analog circuits, time-domain analysis, equivalent circuits, analogue processing circuits
51Jorge Luís Machado do Amaral, José Franco Machado do Amaral, Cristina Costa Santini, Ricardo Tanscheit, Marley M. B. R. Vellasco, Marco Aurélio Cavalcanti Pacheco, Antonio Carneiro de Mesquita Filho Evolvable Building Blocks for Analog Fuzzy Logic Controllers. Search on Bibsonomy Evolvable Hardware The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
50Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin Low Cost On-Line Testing Strategy for RF Circuits. Search on Bibsonomy J. Electron. Test. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF on-line analog testing, DSP-based testing, analog test
49Saied Hemati, Amir H. Banihashemi Iterative decoding in analog CMOS. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2003 DBLP  DOI  BibTeX  RDF analog CMOS, analog iterative decoder, asynchronous iterative decoding, min-sum decoding, soft decoding, analog circuit, turbo codes, iterative decoding, low-density parity-check codes
49Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin Ultimate low cost analog BIST. Search on Bibsonomy DAC The full citation details ... 2003 DBLP  DOI  BibTeX  RDF DSP-based analog test, low cost analog BIST, test of analog circuits
49Naveena Nagi, Abhijit Chatterjee, Ashok Balivada, Jacob A. Abraham Efficient multisine testing of analog circuits. Search on Bibsonomy VLSI Design The full citation details ... 1995 DBLP  DOI  BibTeX  RDF waveform analysis, biquadratic filters, multisine testing, test waveform generation, test confidence, fault-based automatic test pattern generator, successive gradient method, sinusoidal signals, fault coverage maximization, biquadratic filter, AC testing, analog IC, fault diagnosis, built-in self test, integrated circuit testing, automatic testing, analog circuits, built-in test, analogue integrated circuits, linear analog circuits
49Paul Mueller, Jan Van der Spiegel, David Blackman, Timothy Chiu, Thomas Clare, Christopher Donham, Tzu-pu Hsieh, Marc Loinaz Design and Fabrication of VLSI Components for a General Purpose Analog Neural Computer. Search on Bibsonomy Analog VLSI Implementation of Neural Systems The full citation details ... 1989 DBLP  DOI  BibTeX  RDF
49Steven Bibyk, Mohammed Ismail 0001 Issues in Analog VLSI and MOS Techniques for Neural Computing. Search on Bibsonomy Analog VLSI Implementation of Neural Systems The full citation details ... 1989 DBLP  DOI  BibTeX  RDF
49John G. Harris, Christof Koch, Jin Luo, John L. Wyatt Jr. Resistive Fuses: Analog Hardware for Detecting Discontinuities in Early Vision. Search on Bibsonomy Analog VLSI Implementation of Neural Systems The full citation details ... 1989 DBLP  DOI  BibTeX  RDF
48Alvernon Walker, Parag K. Lala A Transition Based BIST Approach for Passive Analog Circuits. Search on Bibsonomy ISQED The full citation details ... 2000 DBLP  DOI  BibTeX  RDF Built-in Self Test, Analog Test, Analog BIST, Mixed-Signal BIST
48Jan Arild Tofte, Chee-Kian Ong, Jiun-Lang Huang, Kwang-Ting (Tim) Cheng Characterization of a Pseudo-Random Testing Technique for Analog and Mixed-Signal Built-in-Self-Test. Search on Bibsonomy VTS The full citation details ... 2000 DBLP  DOI  BibTeX  RDF cross-correlation signature register, CCSR, implicit functional testing, harmonic distortion, THD, classification, synthesis, noise, BIST, convex hull, polygon, discrimination, analog test, cross-correlation, mixed-signal, pseudo-random, pseudo-random, labview, impulse response, performance parameter, analog BIST
48Michel Renovell, Florence Azaïs, Yves Bertrand A design-for-test technique for multistage analog circuits. Search on Bibsonomy Asian Test Symposium The full citation details ... 1995 DBLP  DOI  BibTeX  RDF design-for-test technique, multistage analog circuits, DFT approach, op-amp-based modules, testability resources, transparent paths, external I/O, local I/O, test mode, on-chip digital resources, analog response penalty, controllability, controllability, integrated circuit testing, design for testability, observability, observability, mixed-signal circuits, mixed analogue-digital integrated circuits, test management, production testing
48Anirudh Devgan, Ronald A. Rohrer Efficient simulation of interconnect and mixed analog-digital circuits in ACES. Search on Bibsonomy VLSI Design The full citation details ... 1995 DBLP  DOI  BibTeX  RDF adaptively controlled explicit simulation, mixed analog-digital circuits, analog circuit simulation, interconnect circuit simulation, AWE macromodels, nonlinear terminations, variable accuracy device models, circuit topology constraints removal, timing, circuit analysis computing, transient analysis, analogue integrated circuits, integrated circuit interconnections, mixed analogue-digital integrated circuits, ACES, transient simulation, timing simulation
47I. Faik Baskaya, Sasank Reddy, Sung Kyu Lim, Tyson S. Hall, David V. Anderson Mapping algorithm for large-scale field programmable analog array. Search on Bibsonomy ISPD The full citation details ... 2005 DBLP  DOI  BibTeX  RDF floating gates, mapping, field programmable analog array
47Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin A Statistical Sampler for a New On-Line Analog Test Method. Search on Bibsonomy J. Electron. Test. The full citation details ... 2003 DBLP  DOI  BibTeX  RDF DSP-based testing, on-line testing, analog test
47Jonathan W. Mills, Matt Parker, Bryce Himebaugh, Craig A. Shue, Brian Kopecky, Chris Weilemann "Empty space" computes: the evolution of an unconventional supercomputer. Search on Bibsonomy Conf. Computing Frontiers The full citation details ... 2006 DBLP  DOI  BibTeX  RDF Lukasiewicz logic, extended analog computer, general purpose analog computer, hybrid digital-analog architecture
46Chauchin Su, Yue-Tsang Chen, Shyh-Jye Jou, Yuan-Tzu Ting Metrology for analog module testing using analog testability bus. Search on Bibsonomy ICCAD The full citation details ... 1996 DBLP  DOI  BibTeX  RDF analog module, analog module testing, multiple instantiation, test response analysis, test waveform, testability bus, design for testability
46Anuja Sehgal, Sule Ozev, Krishnendu Chakrabarty Test infrastructure design for mixed-signal SOCs with wrapped analog cores. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
46Anuja Sehgal, Fang Liu 0029, Sule Ozev, Krishnendu Chakrabarty Test Planning for Mixed-Signal SOCs with Wrapped Analog Cores. Search on Bibsonomy DATE The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
46Anuja Sehgal, Sule Ozev, Krishnendu Chakrabarty A Flexible Design Methodology for Analog Test Wrappers in Mixed-Signal SOCs. Search on Bibsonomy ICCD The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
46Tathagato Rai Dastidar, P. P. Chakrabarti 0001 A Verification System for Transient Response of Analog Circuits Using Model Checking. Search on Bibsonomy VLSI Design The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
45Yvan Maidon, Thomas Zimmer, André Ivanov An Analog Circuit Fault Characterization Methodology. Search on Bibsonomy J. Electron. Test. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF analog circuit testing, analog fault diagnosis, analog fault characterization
43Bo Liu 0003, Francisco V. Fernández 0001, Georges G. E. Gielen, Rafael Castro-López, Elisenda Roca A memetic approach to the automatic design of high-performance analog integrated circuits. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF Analog circuit sizing, analog design automation, constrained optimization, memetic algorithm
43Eric E. Fabris, Luigi Carro, Sergio Bampi Modeling and designing high performance analog reconfigurable circuits. Search on Bibsonomy SBCCI The full citation details ... 2004 DBLP  DOI  BibTeX  RDF analog programmability, band-pass sigma-delta modulator, analog design, FPAA
43Luigi Carro, Érika F. Cota, Marcelo Lubaszewski, Yves Bertrand, Florence Azaïs, Michel Renovell TI-BIST: a temperature independent analog BIST for switched-capacitor filters. Search on Bibsonomy Asian Test Symposium The full citation details ... 2000 DBLP  DOI  BibTeX  RDF temperature independent analog BIST, simulation, built-in self test, BIST, analogue circuits, switched capacitor filters, switched-capacitor filters, analog BIST
43Ramakrishna Voorakaranam, Abhijit Chatterjee Feedback Driven Backtrace of Analog Signals and its Application to Circuit Verification and Test. Search on Bibsonomy ARVLSI The full citation details ... 1999 DBLP  DOI  BibTeX  RDF analog verification, fault diagnosis, test generation, analog testing, Backtrace
43Chanchal Chatterjee, Vwani P. Roychowdhury An efficient contrast-enhancement method using the analog to digital converter. Search on Bibsonomy Mach. Vis. Appl. The full citation details ... 1996 DBLP  DOI  BibTeX  RDF Analog enhancement, Analog to digital converter
43Hari Vijay Venkatanarayanan, Michael L. Bushnell An Area Efficient Mixed-Signal Test Architecture for Systems-on-a-Chip. Search on Bibsonomy VLSI Design The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
43Hamid Reza Ghasemi, Zainalabedin Navabi An Effective VHDL-AMS Simulation Algorithm with Event Partitioning. Search on Bibsonomy VLSI Design The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
42Eric Soenen Physical design methodology for analog circuitsin a system-on-a-chip environment. Search on Bibsonomy ISPD The full citation details ... 2009 DBLP  DOI  BibTeX  RDF analog design automation
42Göran Jerke, Jens Lienig Constraint-driven design: the next step towards analog design automation. Search on Bibsonomy ISPD The full citation details ... 2009 DBLP  DOI  BibTeX  RDF constraint-driven design, constraints, layout, physical design, analog design
42Didier Keymeulen, Adrian Stoica, Ricardo Salem Zebulum, Srinivas Katkoori, Pradeep Fernando, Hariharan Sankaran, Mohammad M. Mojarradi, Taher Daud Self-Reconfigurable Mixed-Signal Integrated Circuits Architecture Comprising a Field Programmable Analog Array and a General Purpose Genetic Algorithm IP Core. Search on Bibsonomy ICES The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Self-Healing and Compensation, Self-reconfigurable, Field Programmable Analog Array
42Bassem A. Alhalabi, Qutaibah M. Malluhi, Rafic A. Ayoubi Non-Refreshing Analog Neural Storage Tailored for On-Chip Learning. Search on Bibsonomy Great Lakes Symposium on VLSI The full citation details ... 1998 DBLP  DOI  BibTeX  RDF non-refreshing static storage, on-chip learning neural networks, analog learning
42Mehdi Ehsanian, Bozena Kaminska, Karim Arabi A new digital test approach for analog-to-digital converter testing. Search on Bibsonomy VTS The full citation details ... 1996 DBLP  DOI  BibTeX  RDF digital test approach, analog/digital converter testing, BIST circuitry, offset error, gain error, DNL, INL, area overhead reduction, medium resolution ADC, high resolution pipelined ADC, A/D converter testing, differential nonlinearity, integral nonlinearity, 1.5 micron, VLSI, built-in self test, built-in self-test, integrated circuit testing, CMOS integrated circuits, CMOS technology, analogue-digital conversion
41Chauchin Su, Yue-Tsang Chen, Shyh-Jye Jou Intrinsic response for analog module testing using an analog testability bus. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2001 DBLP  DOI  BibTeX  RDF analog testability bus, intrinsic response, design for testability, analog testing, boundary scan
41Chauchin Su, Yue-Tsang Chen Crosstalk Effect Removal for Analog Measurement in Analog Test Bus. Search on Bibsonomy VTS The full citation details ... 2000 DBLP  DOI  BibTeX  RDF Analog Test Bus, Design for Testability, Analog Test, Mixed Signal Test
41Carver Mead Adaptive Retina. Search on Bibsonomy Analog VLSI Implementation of Neural Systems The full citation details ... 1989 DBLP  DOI  BibTeX  RDF
41Christopher R. Carroll A Neural Processor for Maze Solving. Search on Bibsonomy Analog VLSI Implementation of Neural Systems The full citation details ... 1989 DBLP  DOI  BibTeX  RDF
41Jan Van der Spiegel, G. Kreider, C. Claeys, I. Debusschere, Giulio Sandini, Paolo Dario, Fausto Fantini, P. Bellutti, Giovanni Soncini A Foveated Retina-Like Sensor Using CCD Technology. Search on Bibsonomy Analog VLSI Implementation of Neural Systems The full citation details ... 1989 DBLP  DOI  BibTeX  RDF
41John Lazzaro, Carver Mead Circuit Models of Sensory Transduction in the Cochlea. Search on Bibsonomy Analog VLSI Implementation of Neural Systems The full citation details ... 1989 DBLP  DOI  BibTeX  RDF
41Misha A. Mahowald, Tobi Delbrück Cooperative Stereo Matching Using Static and Dynamic Image Features. Search on Bibsonomy Analog VLSI Implementation of Neural Systems The full citation details ... 1989 DBLP  DOI  BibTeX  RDF
41Eric A. Vittoz, Xavier Arreguit CMOS Integration of Herault-Jutten Cells for Separation of Sources. Search on Bibsonomy Analog VLSI Implementation of Neural Systems The full citation details ... 1989 DBLP  DOI  BibTeX  RDF
41Tobi Delbrück A Chip that Focuses an Image on Itself. Search on Bibsonomy Analog VLSI Implementation of Neural Systems The full citation details ... 1989 DBLP  DOI  BibTeX  RDF
41Haralabos C. Papadopoulos, Carl-Erik W. Sundberg Precoded Modulo-Precanceling Systems for Simulcasting Analog FM and Digital Data. Search on Bibsonomy IEEE Trans. Commun. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
41Renée St. Amant, Daniel A. Jiménez, Doug Burger Low-power, high-performance analog neural branch prediction. Search on Bibsonomy MICRO The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
41Sambuddha Bhattacharya, Nuttorn Jangkrajarng, C.-J. Richard Shi Multilevel symmetry-constraint generation for retargeting large analog layouts. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
41Saied Hemati, Amir H. Banihashemi Dynamics and performance analysis of analog iterative decoding for low-density parity-check (LDPC) codes. Search on Bibsonomy IEEE Trans. Commun. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
41Ami Litman, Shiri Moran-Schein Smooth scheduling under variable rates or the analog-digital confinement game. Search on Bibsonomy SPAA The full citation details ... 2006 DBLP  DOI  BibTeX  RDF EDF schemes, EDF strategies, concurrent confinement games, confinement games, non-concurrent confinement games, smooth scheduling, variable rates, online scheduling, two players games
41Aditya D. Sathe, Michael L. Bushnell, Vishwani D. Agrawal Analog Macromodeling of Capacitive Coupling Faults in Digital Circuit Interconnects. Search on Bibsonomy ITC The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
41Brian A. A. Antao, Arthur J. Brodersen ARCHGEN: Automated synthesis of analog systems. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 1995 DBLP  DOI  BibTeX  RDF
41Fa-Long Luo, Rolf Unbehauen, Hongqin Xue Continuous-time computation of the eigenvectors of a class of positive definite matrices. Search on Bibsonomy PDP The full citation details ... 1995 DBLP  DOI  BibTeX  RDF analogue computers, continuous-time computation, analog circuit approach, specialized analog computers, asynchronous parallel processing, continuous-time dynamics, high-speed computational capability, real-time applications fields, parallel processing, neural nets, matrix algebra, eigenvectors, special purpose computers, eigenvalues and eigenfunctions, neural chips, positive definite matrices
39Eric E. Fabris, Luigi Carro, Sergio Bampi Analog Signal Processing Reconfiguration for Systems-on-Chip Using a Fixed Analog Cell Approach. Search on Bibsonomy FPL The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
39John C. Gallagher The Once and Future Analog Alternative: Evolvable Hardware and Analog Computation. Search on Bibsonomy Evolvable Hardware The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
39Adrián Núñez-Aldana, Ranga Vemuri An Analog Performance Estimator for Improving the Effectiveness of CMOS Analog Systems Circuit Synthesis. Search on Bibsonomy DATE The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
39Hugo de Lemos Haas, José Gabriel Rodríguez Carneiro Gomes, Antonio Petraglia Viability of analog inner product operations in CMOS imagers. Search on Bibsonomy SBCCI The full citation details ... 2007 DBLP  DOI  BibTeX  RDF CMOS analog hardware, analog image processing, vector quantization
39Farzan Aminian, Mehran Aminian Fault Diagnosis of Analog Circuits Using Bayesian Neural Networks with Wavelet Transform as Preprocessor. Search on Bibsonomy J. Electron. Test. The full citation details ... 2001 DBLP  DOI  BibTeX  RDF analog fault diagnosis, Bayesiasn learning, neural networks, analog circuits
39Matthew Worsman, Mike W. T. Wong, Yim-Shu Lee Analog circuit equivalent faults in the D.C. domain. Search on Bibsonomy Asian Test Symposium The full citation details ... 2000 DBLP  DOI  BibTeX  RDF analog circuit faults, fault simulation data, equivalent faults, equivalent fault identification, built-in self test, design for testability, data analysis, fault simulation, fault location, fault location, analogue circuits, linear analog circuits
39Anna Maria Brosa, Joan Figueras Characterization of Floating Gate Defects in Analog Cells. Search on Bibsonomy J. Electron. Test. The full citation details ... 1999 DBLP  DOI  BibTeX  RDF floating gate defect, low-power/low-voltage analog circuits, analog testing
39Guido Dröge, Manfred Thole, Ernst-Helmut Horneber EASY - a System for Computer-Aided Examination of Analog Circuits. Search on Bibsonomy DATE The full citation details ... 1998 DBLP  DOI  BibTeX  RDF analog design system, computer-aided design, analog circuits, symbolic analysis, qualitative analysis
39Salvador Mir, Marcelo Lubaszewski, Bernard Courtois Fault-based ATPG for linear analog circuits with minimal size multifrequency test sets. Search on Bibsonomy J. Electron. Test. The full citation details ... 1996 DBLP  DOI  BibTeX  RDF analog ATPG, fault diagnosis, fault-based testing, analog BIST
39Bogdan G. Arsintescu A Method for Analog Circuits Visualization. Search on Bibsonomy ICCD The full citation details ... 1996 DBLP  DOI  BibTeX  RDF Analog circuits visualization, Design verification tools, Computer aided design for analog circuits
38Salem Abdennadher, Saghir A. Shaikh Practices in Testing of Mixed-Signal and RF SoCs. Search on Bibsonomy Asian Test Symposium The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
38Rakesh Chadha, Chandramouli Visweswariah, Chin-Fu Chen M3-a multilevel mixed-mode mixed A/D simulator. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1992 DBLP  DOI  BibTeX  RDF
37Mark Horowitz, Metha Jeeradit, Frances Lau, Sabrina Liao, ByongChan Lim, James Mao Fortifying analog models with equivalence checking and coverage analysis. Search on Bibsonomy DAC The full citation details ... 2010 DBLP  DOI  BibTeX  RDF analog validation, model-first design, design methodology, fault coverage, equivalence checking, formal validation
37Zhihong Feng, Zhigui Lin, Wei Fang, Wei Wang, Zhitao Xiao Analog Circuit Fault Fusion Diagnosis Method Based on Support Vector Machine. Search on Bibsonomy ISNN (2) The full citation details ... 2009 DBLP  DOI  BibTeX  RDF Multi- classification, Support Vector Machine, Fault diagnosis, Analog circuit
37Meng-Hui Wang, Yu-Kuo Chung, Wen-Tsai Sung The Fault Diagnosis of Analog Circuits Based on Extension Theory. Search on Bibsonomy ICIC (1) The full citation details ... 2009 DBLP  DOI  BibTeX  RDF Extension theory (ET), Fault diagnosis, Analog circuit
37Corneliu Rusu, Lacrimioara Grama, Jarmo Takala SPICE Simulation of Analog Filters: A Method for Designing Digital Filters. Search on Bibsonomy EUROCAST The full citation details ... 2009 DBLP  DOI  BibTeX  RDF analog filter, SPICE, digital filter
37Mark Po-Hung Lin, Hongbo Zhang 0001, Martin D. F. Wong, Yao-Wen Chang Thermal-driven analog placement considering device matching. Search on Bibsonomy DAC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF analog placement, thermal matching
37Mark Po-Hung Lin, Shyh-Chang Lin Analog placement based on hierarchical module clustering. Search on Bibsonomy DAC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF analog placement, floorplanning
37A. A. Mariano, B. Boumballa, Dominique Dallet, Yann Deval, Jean-Baptiste Bégueret High-speed CMOS analog-to-digital converter for front-end receiver applications. Search on Bibsonomy SBCCI The full citation details ... 2007 DBLP  DOI  BibTeX  RDF flash structure, analog-to-digital converter, data-conversion
37Raffaella Gentilini, Klaus Schneider 0001, Alexander Dreyer Three-valued automated reasoning on analog properties. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2007 DBLP  DOI  BibTeX  RDF (multi valued) temporal logics & model checking, interval arithmetic, analog circuits
37Lei Feng, Won Namgoong An Analog/Digital Baseband Processor Design of a UWB Channelized Receiver for Transmitted Reference Signals. Search on Bibsonomy J. VLSI Signal Process. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF transmitted reference, channelized receiver, coarse acquisition, synchronization, Ultra-wideband, analog-to-digital converter
37Alex Doboli, Nagu R. Dhanwada, Adrián Núñez-Aldana, Ranga Vemuri A two-layer library-based approach to synthesis of analog systems from VHDL-AMS specifications. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF genetic algorithms, branch-and-bound, performance estimation, VHDL-AMS, Analog synthesis
37Sheldon X.-D. Tan, Weikun Guo, Zhenyu Qi Hierarchical approach to exact symbolic analysis of large analog circuits. Search on Bibsonomy DAC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF MEMS and/or RF design tools, behavioral modeling, analog, circuit simulation, symbolic analysis, mixed-signal
37Walter Hartong, Lars Hedrich, Erich Barke Model checking algorithms for analog verification. Search on Bibsonomy DAC The full citation details ... 2002 DBLP  DOI  BibTeX  RDF nonlinear analog systems, model checking, formal methods
37Sasikumar Cherubal, Abhijit Chatterjee Test generation for fault isolation in analog circuits using behavioral models. Search on Bibsonomy Asian Test Symposium The full citation details ... 2000 DBLP  DOI  BibTeX  RDF multiple parameter variations, manufacturing tolerances, test generation, fault location, behavioral models, analog circuits, analogue integrated circuits, fault isolation, circuit testing, behavioral descriptions, parametric failures, measurement noise
37Sudip Chakrabarti, Abhijit Chatterjee Compact Fault Dictionary Construction for Efficient Isolation of Faults in Analog and Mixed-Signal Circuits. Search on Bibsonomy ARVLSI The full citation details ... 1999 DBLP  DOI  BibTeX  RDF fault diagnosis, analog, Design automation, mixed-signal, fault isolation
37Christian Dufaza, Hassan Ihs A BIST-DFT technique for DC test of analog modules. Search on Bibsonomy J. Electron. Test. The full citation details ... 1996 DBLP  DOI  BibTeX  RDF current and voltage self-testing, Built-In Voltage Sensor, Built-In Self Test, Design For Testability, analog BIST
37Samiran Halder, Swapna Banerjee, Arindrajit Ghosh, Ravi Sankar Prasad, Anirban Chatterjee, Sanjoy Kumar Dey A 10-Bit 80-MSPS 2.5-V 27.65-mW 0.185-mm2 Segmented Current Steering CMOS DAC. Search on Bibsonomy VLSI Design The full citation details ... 2005 DBLP  DOI  BibTeX  RDF MOS Analog Circuits, Digital to Analog Conversion, Mixed Analog -Digital Integrated Circuits, Low Power
36Diego Pedro Morales, Antonio García 0001, Alberto J. Palma, Miguel A. Carvajal, Encarnación Castillo, Luis F. Capitán-Vallvey Enhancing ADC resolution through Field Programmable Analog Array dynamic reconfiguration. Search on Bibsonomy FPL The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
36Saied Hemati, Amir H. Banihashemi Convergence Speed and Throughput of Analog Decoders. Search on Bibsonomy IEEE Trans. Commun. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
36Adrian Stoica, Didier Keymeulen, Ricardo Salem Zebulum, Mohammad M. Mojarradi, Srinivas Katkoori, Taher Daud Adaptive and Evolvable Analog Electronics for Space Applications. Search on Bibsonomy ICES The full citation details ... 2007 DBLP  DOI  BibTeX  RDF Adaptive Hardware, Field Programmable Arrays
36Ricardo Salem Zebulum, Mohammad M. Mojarradi, Adrian Stoica, Didier Keymeulen, Taher Daud Self-Reconfigurable Analog Arrays: Off-The Shelf Adaptive Electronics for Space Applications. Search on Bibsonomy AHS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
36Markus Bühler, Jürgen Koehl, Jeanne Bickford, Jason Hibbeler, Ulf Schlichtmann, Ralf Sommer, Michael Pronath, Andreas Ripp DFM/DFY design for manufacturability and yield - influence of process variations in digital, analog and mixed-signal circuit design. Search on Bibsonomy DATE The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
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