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Found 50014 publication records. Showing 49999 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
78Ananta K. Majhi, Vishwani D. Agrawal Tutorial: Delay Fault Models and Coverage. Search on Bibsonomy VLSI Design The full citation details ... 1998 DBLP  DOI  BibTeX  RDF delay fault models, gate delay model, line delay model, path delay model, segment delay model, transition model, Delay test
60W. Melody Moh, Yu-Jen Chien, Irene Zhang, Teng-Sheng Moh Delay performance evaluation of high speed protocols for multimedia communications. Search on Bibsonomy ICCCN The full citation details ... 1995 DBLP  DOI  BibTeX  RDF delay performance evaluation, high speed protocols, delay fairness, worst-case delay performance, distributed queue dual bus, CRMA, cyclic reservation multiple access, DQMA, distributed queue multiple access, FDQ, fair distributed queue, heavy network load, reservation-based protocols, throughput, multimedia communication, multimedia communication, multimedia traffic, quality of service requirements, DQDB, access delay, message delay, heterogeneous traffic
55Subhrajit Bhattacharya, Sujit Dey, Franc Brglez Fast true delay estimation during high level synthesis. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1996 DBLP  DOI  BibTeX  RDF
52Mukund Sivaraman, Andrzej J. Strojwas Diagnosis of parametric path delay faults. Search on Bibsonomy VLSI Design The full citation details ... 1996 DBLP  DOI  BibTeX  RDF parametric path delay faults, chip failure, fabrication process parameter values, path sensitization mechanism, path delay conditions, ISCAS'89 benchmark circuits, path segment, circuit failure, fault diagnosis, logic testing, logic testing, delays, probability, probability, statistical analysis, statistical analysis, integrated circuit testing, failure analysis, diagnosability, delay fault testing, IC testing, production testing
49Ioannis Papapanagiotou, John S. Vardakas, Georgios S. Paschos, Michael D. Logothetis, Stavros A. Kotsopoulos Performance evaluation of IEEE 802.11e based on ON-OFF traffic model. Search on Bibsonomy MobiMedia The full citation details ... 2007 DBLP  DOI  BibTeX  RDF MAC delay, QoS, IEEE 802.11e, end-to-end delay, queuing delay
49Eun Sei Park, M. Ray Mercer, Thomas W. Williams The Total Delay Fault Model and Statistical Delay Fault Coverage. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 1992 DBLP  DOI  BibTeX  RDF delay fault model, delay fault coverage, statistical delay fault coverage, defect level model, logic testing, delay testing, delay faults
46Youxin Gao, D. F. Wong 0001 Wire-Sizing for Delay Minimization and Ringing Control Using Transmission Line Model. Search on Bibsonomy DATE The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
43Branka Medved Rogina, Bozidar Vojnovic Metastability evaluation method by propagation delay distribution measurement. Search on Bibsonomy Asian Test Symposium The full citation details ... 1995 DBLP  DOI  BibTeX  RDF propagation delay distribution measurement, edge-triggered flip-flops, input signals time relationship, output signal timing characteristics, analytical representation, propagation delay density distribution function, fault events, integrated propagation delay density distribution function, flip-flop normal propagation delay, resolution time constant, automatic data acquisition, complex architecture microsystems, MTBF, latch devices, custom CMOS, VLSI, VLSI, fault diagnosis, logic testing, delays, logic design, asynchronous circuits, flip-flops, data acquisition, failure analysis, reliability analysis, graphical representation, metastability, PLD, asynchronous logic, integrated circuit reliability, statistical measurement
43Zaifu Zhang, Robert D. McLeod, Gregory E. Bridges Statistical estimation of delay fault detectabilities and fault grading. Search on Bibsonomy J. Electron. Test. The full citation details ... 1996 DBLP  DOI  BibTeX  RDF transition delay and path delay faults, statistical delay fault analysis, fault detectabilities, fault coverage, random patterns
43Andrew B. Kahng, Kei Masuko, Sudhakar Muddu Analytical delay models for VLSI interconnects under ramp input. Search on Bibsonomy ICCAD The full citation details ... 1996 DBLP  DOI  BibTeX  RDF SPICE-computed delay, VLSI routing topologies layout, analytical delay models, arbitrary interconnect trees, interconnect transfer function, performance-driven synthesis, ramp input, source-sink delays, VLSI, Elmore delay, interconnect delays, VLSI interconnects, RLC interconnections
42Huawei Li 0001, Zhongcheng Li, Yinghua Min Reduction of Number of Paths to be Tested in Delay Testing. Search on Bibsonomy J. Electron. Test. The full citation details ... 2000 DBLP  DOI  BibTeX  RDF linearly independent, analytical delay model, delay testing, path sensitization
42Hiroshi Takahashi, Takashi Watanabe, Yuzo Takamatsu Generation of tenacious tests for small gate delay faults in combinational circuits. Search on Bibsonomy Asian Test Symposium The full citation details ... 1995 DBLP  DOI  BibTeX  RDF tenacious tests, small gate delay faults, single gate delay fault, ISCAS'85 benchmark circuits, fault diagnosis, logic testing, delays, test generation, combinational circuits, combinational circuits, fault coverage
42Rodica Branzei, Giulio Ferrari, Vito Fragnelli, Stef Tijs Two Approaches to the Problem of Sharing Delay Costs in Joint Projects. Search on Bibsonomy Ann. Oper. Res. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF activity graph, delay cost, taxation, serial cost sharing, bankruptcy
41William K. C. Lam, Alexander Saldanha, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli Delay fault coverage, test set size, and performance trade-offs. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1995 DBLP  DOI  BibTeX  RDF
40Mukund Sivaraman, Andrzej J. Strojwas Timing analysis based on primitive path delay fault identification. Search on Bibsonomy ICCAD The full citation details ... 1997 DBLP  DOI  BibTeX  RDF primitive path delay faults, correlated delay, floating mode, timing analysis, timing verification, false path, path delay fault testing
40Sudhakar M. Reddy, Peter Maxwell Fundamentals of Small-Delay Defect Testing. Search on Bibsonomy Testing for Small-Delay Defects in Nanoscale CMOS Integrated Circuits The full citation details ... 2014 DBLP  BibTeX  RDF
40Sandeep Kumar Goel, Krishnendu Chakrabarty Circuit Topology-Based Test Pattern Generation for Small-Delay Defects. Search on Bibsonomy Testing for Small-Delay Defects in Nanoscale CMOS Integrated Circuits The full citation details ... 2014 DBLP  BibTeX  RDF
40Sandeep Kumar Goel, Narendra Devta-Prasanna Hybrid/Top-off Test Pattern Generation Schemes for Small-Delay Defects. Search on Bibsonomy Testing for Small-Delay Defects in Nanoscale CMOS Integrated Circuits The full citation details ... 2014 DBLP  BibTeX  RDF
40Narendra Devta-Prasanna, Sandeep Kumar Goel Small-Delay Defect Coverage Metrics. Search on Bibsonomy Testing for Small-Delay Defects in Nanoscale CMOS Integrated Circuits The full citation details ... 2014 DBLP  BibTeX  RDF
40Nisar Ahmed, Mohammad Tehranipoor Faster-than-at-Speed Test for Screening Small-Delay Defects. Search on Bibsonomy Testing for Small-Delay Defects in Nanoscale CMOS Integrated Circuits The full citation details ... 2014 DBLP  BibTeX  RDF
40Abdelmajid Khelil, Faisal Karim Shaikh, Azad Ali, Neeraj Suri, Christian Reinl Delay Tolerant Monitoring of Mobility-Assisted WSN. Search on Bibsonomy Delay Tolerant Networks The full citation details ... 2011 DBLP  BibTeX  RDF
40Angela Sara Cacciapuoti, Marcello Caleffi, Luigi Paura Mobile Peer-to-Peer Systems over Delay Tolerant Networks. Search on Bibsonomy Delay Tolerant Networks The full citation details ... 2011 DBLP  BibTeX  RDF
40Corrado Moiso, Antonio Manzalini, Francesco De Pellegrini, Iacopo Carreras, Daniele Miorandi, Athanasios V. Vasilakos R-P2P: a Data-Centric Middleware for Delay Tolerant Applications. Search on Bibsonomy Delay Tolerant Networks The full citation details ... 2011 DBLP  BibTeX  RDF
40Maode Ma, Chao Lu, Hui Li 0006 Delay Tolerant Networking. Search on Bibsonomy Delay Tolerant Networks The full citation details ... 2011 DBLP  BibTeX  RDF
40Ruhai Wang, Xuan Wu, Tiaotiao Wang, Tarik Taleb Delay Tolerant Networking (DTN) Protocols for Space Communications. Search on Bibsonomy Delay Tolerant Networks The full citation details ... 2011 DBLP  BibTeX  RDF
40Seung Keun Yoon, Zygmunt J. Raas Energy-Aware Routing Protocol for Delay Tolerant Networks. Search on Bibsonomy Delay Tolerant Networks The full citation details ... 2011 DBLP  BibTeX  RDF
40Kevin R. Fall, Cecilia Mascolo, Jörg Ott, Lars C. Wolf 09071 Executive Summary - Delay and Disruption-Tolerant Networking (DTN) II. Search on Bibsonomy Delay and Disruption-Tolerant Networking (DTN) II The full citation details ... 2009 DBLP  BibTeX  RDF
40Kevin R. Fall, Cecilia Mascolo, Jörg Ott, Lars C. Wolf 09071 Abstracts Collection - Delay and Disruption-Tolerant Networking (DTN) II. Search on Bibsonomy Delay and Disruption-Tolerant Networking (DTN) II The full citation details ... 2009 DBLP  BibTeX  RDF
40Baris Bozkurt, Thierry Dutoit, Laurent Couvreur Spectral Analysis of Speech Signals Using Chirp Group Delay. Search on Bibsonomy WNSP The full citation details ... 2005 DBLP  DOI  BibTeX  RDF Phase processing, chirp group delay, group delay, zzt, ASR feature extraction
40Wei-Cheng Lai, Angela Krstic, Kwang-Ting Cheng On Testing the Path Delay Faults of a Microprocessor Using its Instruction Set. Search on Bibsonomy VTS The full citation details ... 2000 DBLP  DOI  BibTeX  RDF Microprocessor self-testing, Path delay fault classification, Functionally testable paths, Functional tests, Delay fault testing
40Shibin Song, Joseph Kee-Yin Ng, Bihai Tang Statistical Delay Analysis with Self-Similar Input Traffic in ATM Networks. Search on Bibsonomy RTCSA The full citation details ... 1999 DBLP  DOI  BibTeX  RDF Real-Time ATM Networks, Statistical Delay Analysis, Efficient Delay Computation, Performance Evaluation, Self-similar Traffic
40Mukund Sivaraman, Andrzej J. Strojwas A diagnosability metric for parametric path delay faults. Search on Bibsonomy VTS The full citation details ... 1996 DBLP  DOI  BibTeX  RDF diagnosability metric, parametric path delay faults, test vector pairs, chip failure, fabrication process parameter variations, diagnosis framework, ISCAS'89 benchmark circuits, VLSI, fault diagnosis, logic testing, delays, timing, integrated circuit testing, failure analysis, diagnosability, delay fault testing, test set
40Ananta K. Majhi, James Jacob, Lalit M. Patnaik, Vishwani D. Agrawal On test coverage of path delay faults. Search on Bibsonomy VLSI Design The full citation details ... 1996 DBLP  DOI  BibTeX  RDF two-pass test generation method, falling transition, line delay test, longest sensitizable path, decreasing length, redundant stuck-at fault, computational complexity, fault diagnosis, logic testing, delays, redundancy, combinational circuits, fault simulation, circuit analysis computing, test coverage, path delay faults, benchmark circuits, coverage metric, combinational logic circuits, longest paths
39Abbas El Gamal, James P. Mammen, Balaji Prabhakar, Devavrat Shah Optimal throughput-delay scaling in wireless networks: part I: the fluid model. Search on Bibsonomy IEEE Trans. Inf. Theory The full citation details ... 2006 DBLP  DOI  BibTeX  RDF throughput scaling, throughput-delay tradeoff, wireless networks, queueing theory, random walks, scaling laws
39Arif Ishaq Abou-Seido, Brian Nowak, Chris C. N. Chu Fitted Elmore Delay: A Simple and Accurate Interconnect Delay Model. Search on Bibsonomy ICCD The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
39Masoud Sharif, Babak Hassibi A delay analysis for opportunistic transmission in fading broadcast channels. Search on Bibsonomy INFOCOM The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
38Matthew K. H. Leung, John C. S. Lui, David K. Y. Yau Characterization and Performance Evaluation for Proportional Delay Differentiated Services. Search on Bibsonomy ICNP The full citation details ... 2000 DBLP  DOI  BibTeX  RDF proportional delay differentiated services, Internet differentiated services, traffic classes, tariff rate, time-dependent priority scheduling, proportional delay model, delay ratios, scheduling parameters, efficient control algorithm, relative waiting time, performance evaluation, performance evaluation, Internet, delays, telecommunication traffic, waiting times, telecommunication services, ISP, feasible regions, average waiting time, service classes
38Seiichiro Tani, Mitsuo Teramoto, Tomoo Fukazawa, Kazuyoshi Matsuhiro Efficient Path Selection for Delay Testing Based on Path Clustering. Search on Bibsonomy J. Electron. Test. The full citation details ... 1999 DBLP  DOI  BibTeX  RDF clustering, delay testing, delay fault, path delay
38Irith Pomeranz, Sudhakar M. Reddy Functional test generation for delay faults in combinational circuits. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 1998 DBLP  DOI  BibTeX  RDF function-robust tests, functional delay fault model, delay faults, path delay faults, robust tests
38Matthew Andrews, Antonio Fernández 0001, Mor Harchol-Balter, Frank Thomson Leighton, Lisa Zhang General Dynamic Routing with Per-Packet Delay Guarantees of O(distance + 1 / session rate). Search on Bibsonomy FOCS The full citation details ... 1997 DBLP  DOI  BibTeX  RDF per-packet delay, queue buildup, scheduling, packet-switching, communication networks, dynamic routing, telecommunication networks, performance guarantees, delay bounds, bursty traffic, packet delay, arbitrary topology
38Aiguo Lu, Erik L. Dagless, Jonathan M. Saul DART: delay and routability driven technology mapping for LUT based FPGAs. Search on Bibsonomy ICCD The full citation details ... 1995 DBLP  DOI  BibTeX  RDF DART, delay driven technology mapping, LUT based FPGAs, two-phased approach, routability directed delay-optimal mapping, stochastic routability analysis, delay-optimal mapping, field programmable gate arrays, delays, logic design, programmable logic arrays, table lookup, minimisation of switching nets
38Wuudiann Ke, Premachandran R. Menon Multifault testability of delay-testable circuits. Search on Bibsonomy VTS The full citation details ... 1995 DBLP  DOI  BibTeX  RDF delay-testable circuits, multifault testability, path-delay-fault testability, multiple stuck-at-fault testability, multilevel combinational circuits, robust path-delay-fault test set, logic testing, delays, combinational circuits, multivalued logic circuits
38Mukund Sivaraman, Andrzej J. Strojwas Delay fault coverage: a realistic metric and an estimation technique for distributed path delay faults. Search on Bibsonomy ICCAD The full citation details ... 1996 DBLP  DOI  BibTeX  RDF fabrication process, coverage, delay testing, delay fault, path sensitization
38Syed Sohel Hussain, Yih-Chyun Jenq Analysis and Optimization of a Banyan-Based ATM Switch by Simulations. Search on Bibsonomy LCN The full citation details ... 1996 DBLP  DOI  BibTeX  RDF Banyan based ATM switch, switch optimization, switch analysis, delay variance, performanc analysis, uniform traffic, three-state model, nonblocking first stage, packet blocking, enhanced priority scheme, single buffer Banyan network, double buffer switching element, delay sensitive voice packet, asynchronous transfer mode, asynchronous transfer mode, delay, throughput, bandwidth, simulation results, voice traffic, data traffic
37Yu-Sheng Huang, Chih-wen Hsueh Minimizing the maximum end-to-end delay on tree structure using the distributed pinwheel model. Search on Bibsonomy RTCSA The full citation details ... 2000 DBLP  DOI  BibTeX  RDF maximum end-to-end delay minimisation, distributed pinwheel model, end-to-end timing requirements, tight maximum delay bound, quality of service, Internet, computational complexity, timing, computer networks, heuristic algorithm, processor scheduling, timing constraints, simulation result, distributed real-time systems, tree structure, heuristic programming, NP-hard problems, linear-time algorithm, pipeline structure
37S. Cremoux, Christophe Fagot, Patrick Girard 0001, Christian Landrault, Serge Pravossoudovitch A new test pattern generation method for delay fault testing. Search on Bibsonomy VTS The full citation details ... 1996 DBLP  DOI  BibTeX  RDF test pattern generation method, directed random generation technique, random test vectors, test sequence length, delay fault coverage, learning (artificial intelligence), VLSI, logic testing, delays, built-in self test, integrated circuit testing, BIST, automatic testing, delay fault testing, digital integrated circuits, learning tool, high speed circuits
37Yinghua Min, Zhuxing Zhao, Zhongcheng Li An Analytical Delay Model Based on Boolean Process. Search on Bibsonomy VLSI Design The full citation details ... 1996 DBLP  DOI  BibTeX  RDF waveform polynomial, transition delay, floating delay, sensitization, Boolean process
37Colin J. Ihrig, Gerold Joseph Dhanabalan, Alex K. Jones A low-power CMOS thyristor based delay element with programmability extensions. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2009 DBLP  DOI  BibTeX  RDF delay element, thyristor, low power
36Swaroop Ghosh, Swarup Bhunia, Arijit Raychowdhury, Kaushik Roy 0001 A Novel Delay Fault Testing Methodology Using Low-Overhead Built-In Delay Sensor. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
36Debashis Bhattacharya, Prathima Agrawal, Vishwani D. Agrawal Test Generation for Path Delay Faults Using Binary Decision Diagrams. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 1995 DBLP  DOI  BibTeX  RDF Boolean algebraic test generation, redundant delay faults, robust delay tests, scan testing of delay faults, binary decision diagrams, delay faults
36Daniel C. McCrackin Eliminating Interlocks in Deeply Pipelined Processors by Delay Enforced Multistreaming. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 1991 DBLP  DOI  BibTeX  RDF deeply pipelined processors, delay enforced multistreaming, data dependency problem, jump problem, interdispatch delay, stream dispatching algorithms, modified fixed delay, encoded delay with fixed minimum, pipeline processing, processor architecture, interleaving, interlocks
35Kai-Hui Chang, Igor L. Markov, Valeria Bertacco Safe Delay Optimization for Physical Synthesis. Search on Bibsonomy ASP-DAC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF safe delay optimization, SafeResynth, safe resynthesis technique, immediately-measurable delay improvement, circuit timing, route length, physical synthesis, electronic design automation, route congestion, circuit delay
35Yen-Lin Peng, Jing-Jia Liou, Chih-Tsun Huang, Cheng-Wen Wu An Application-Independent Delay Testing Methodology for Island-Style FPGA. Search on Bibsonomy DFT The full citation details ... 2004 DBLP  DOI  BibTeX  RDF segment delay fault, FPGA, delay testing, path delay fault
35Maria K. Michael, Spyros Tragoudas ATPG tools for delay faults at the functional level. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF functional-level testing, path delay fault simulation (coverage), testing digital circuits, Automatic test pattern generation, Binary Decision Diagrams, delay testing, Boolean Satisfiability, path delay fault testing
35Wen Ching Wu, Chung-Len Lee 0001, Ming Shae Wu, Jwu E. Chen, Magdy S. Abadir Oscillation Ring Delay Test for High Performance Microprocessors. Search on Bibsonomy J. Electron. Test. The full citation details ... 2000 DBLP  DOI  BibTeX  RDF oscillation ring testing, sensitized path, robust path dealy fault, hazard-free path delay fault, multiple reconvergent fanout, flunk lines, stuck at fault, delay fault testing, gate delay fault
35Jing-Jia Liou, Kwang-Ting Cheng, Deb Aditya Mukherjee Path Selection for Delay Testing of Deep Sub-Micron Devices Using Statistical Performance Sensitivity Analysis. Search on Bibsonomy VTS The full citation details ... 2000 DBLP  DOI  BibTeX  RDF delay defects, delay fault modeling, delay testing, critical paths, statistical timing analysis
35Wen-Ben Jone, Yun-Pan Ho, Sunil R. Das Delay Fault Coverage Enhancement Using Variable Observation Times. Search on Bibsonomy J. Electron. Test. The full citation details ... 1997 DBLP  DOI  BibTeX  RDF statistical delay fault coverage, delay test observation times, delay fault testing
35Joseph Kee-Yin Ng, Shibin Song, Wei Zhao 0001 Integrated delay analysis of regulated ATM switch. Search on Bibsonomy RTSS The full citation details ... 1997 DBLP  DOI  BibTeX  RDF integrated delay analysis, regulated ATM switch, worst case delay, hard real-time connection, real-time connection traffic, arrival functions, priority driven scheduling, FIFO scheduling, admission probability, cell delay estimation, performance, asynchronous transfer mode, deadline, simulation experiments, service functions, piecewise linear functions
35Chung-Ping Chen, Hai Zhou 0001, D. F. Wong 0001 Optimal non-uniform wire-sizing under the Elmore delay model. Search on Bibsonomy ICCAD The full citation details ... 1996 DBLP  DOI  BibTeX  RDF Elmore delay model, IBM RS/6000 workstation, NWSA-db, NWSA-md, NWSA-wd algorithm, general routing trees, maximum sink delay, minimization objectives, optimal nonuniform wire sizing, routing-tree problem, sink-delay bounds, total area, total weighted sink-delays, wire-sizing formula, circuit analysis computing, Lagrangian relaxation
35Jacob Savir Generator choices for delay test. Search on Bibsonomy Asian Test Symposium The full citation details ... 1995 DBLP  DOI  BibTeX  RDF BIST based delay test, generator choices, delay test vector generator, nonscan designs, transition test, skewed-load delay test, shift dependency, digital logic circuits, performance, VLSI, fault diagnosis, logic testing, delays, built-in self test, integrated circuit testing, ATPG, automatic testing, flexibility, linear feedback shift register, cost, shift registers, scan designs, boundary scan testing, test vectors, timing requirement, pseudo-random test
35Hagit Attiya, David Hay The inherent queuing delay of parallel packet switches. Search on Bibsonomy SPAA The full citation details ... 2004 DBLP  DOI  BibTeX  RDF leaky-bucket traffic, load balancing, packet switching, clos networks, queuing delay, delay jitter, inverse multiplexing
35Moonsoo Kang, Chansu Yu Job-Based Queue Delay Modeling in a Space-Shared Hypercube. Search on Bibsonomy ICPP Workshops The full citation details ... 1999 DBLP  DOI  BibTeX  RDF topological delay, processor allocation, space sharing, queue delay, Hypercube computer
35Angela Krstic, Kwang-Ting Cheng Resynthesis of Combinational Circuits for Path Count Reduction and for Path Delay Fault Testability. Search on Bibsonomy J. Electron. Test. The full citation details ... 1997 DBLP  DOI  BibTeX  RDF resynthesis for testability, timing defects, delay testing, path delay faults, VLSI testing
35Hiroshi Takahashi, Kwame Osei Boateng, Yuzo Takamatsu, Toshiyuki Matsunaga A Method of Generating Tests for Marginal Delays an Delay Faults in Combinational Circuits. Search on Bibsonomy Asian Test Symposium The full citation details ... 1997 DBLP  DOI  BibTeX  RDF marginal delay, test generation, combinational circuit, gate delay faults
35Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram Timing-based delay test for screening small delay defects. Search on Bibsonomy DAC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF test generation, delay testing
35Taieb Znati, Rami G. Melhem Node delay assignment strategies to support end-to-end delay requirements in heterogeneous networks. Search on Bibsonomy IEEE/ACM Trans. Netw. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF quality of service (QoS), packet scheduling, end-to-end delay
35Duncan M. Hank Walker K Longest Paths. Search on Bibsonomy Testing for Small-Delay Defects in Nanoscale CMOS Integrated Circuits The full citation details ... 2014 DBLP  BibTeX  RDF
35Mahmut Yilmaz Output Deviations-Based SDD Testing. Search on Bibsonomy Testing for Small-Delay Defects in Nanoscale CMOS Integrated Circuits The full citation details ... 2014 DBLP  BibTeX  RDF
35Ke Peng, Mahmut Yilmaz, Mohammad Tehranipoor Circuit Path Grading Considering Layout, Process Variations, and Cross Talk. Search on Bibsonomy Testing for Small-Delay Defects in Nanoscale CMOS Integrated Circuits The full citation details ... 2014 DBLP  BibTeX  RDF
35Mark Kassab, Benoit Nadeau-Dostie, Xijiang Lin Timing-Aware ATPG. Search on Bibsonomy Testing for Small-Delay Defects in Nanoscale CMOS Integrated Circuits The full citation details ... 2014 DBLP  BibTeX  RDF
35Haojin Zhu, Xiaodong Lin 0001, Rongxing Lu, Yanfei Fan, Xuemin Shen A Routing-Compatible Credit-Based Incentive Scheme for DTNs. Search on Bibsonomy Delay Tolerant Networks The full citation details ... 2011 DBLP  BibTeX  RDF
35Thrasyvoulos Spyropoulos, Rao Naveed Bin Rais, Thierry Turletti, Katia Obraczka, Athanasios V. Vasilakos DTN Routing: Taxonomy and Design. Search on Bibsonomy Delay Tolerant Networks The full citation details ... 2011 DBLP  BibTeX  RDF
35Carlo Caini, Rosario Firrincieli DTN and Satellite Communications. Search on Bibsonomy Delay Tolerant Networks The full citation details ... 2011 DBLP  BibTeX  RDF
35Shabbir Ahmed 0002, Salil S. Kanhere Message Dissemination in Vehicular Networks. Search on Bibsonomy Delay Tolerant Networks The full citation details ... 2011 DBLP  BibTeX  RDF
35Kevin R. Fall, Cecilia Mascolo, Jörg Ott, Lars C. Wolf (eds.) Delay and Disruption-Tolerant Networking (DTN) II, 08.02. - 11.02.2009 Search on Bibsonomy Delay and Disruption-Tolerant Networking (DTN) II The full citation details ... 2009 DBLP  BibTeX  RDF
35Gunnar Karlsson, Ólafur Ragnar Helgason, Vladimir Vukadinovic On the Performance of Pedestrian Content Distribution. Search on Bibsonomy Delay and Disruption-Tolerant Networking (DTN) II The full citation details ... 2009 DBLP  BibTeX  RDF
35Eiko Yoneki, Pan Hui 0001, Jon Crowcroft Wireless Epidemic Spread in Dynamic Human Networks. Search on Bibsonomy Delay and Disruption-Tolerant Networking (DTN) II The full citation details ... 2009 DBLP  BibTeX  RDF
34Josef Schmid, Timo Schüring, Christoph Smalla Using the Boundary Scan Delay Chain for Cross-Chip Delay Measurement and Characterization of Delay Modeling Flow. Search on Bibsonomy ISQED The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
34Petar Djukic, Shahrokh Valaee Delay aware link scheduling for multi-hop TDMA wireless networks. Search on Bibsonomy IEEE/ACM Trans. Netw. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF TDMA scheduling algorithms, scheduling delay, stop-and-go queueing
34I-De Huang, Yi-Shing Chang, Sandeep K. Gupta 0001, Sreejit Chakravarty An Industrial Case Study of Sticky Path-Delay Faults. Search on Bibsonomy VTS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF sticky paths, timing false paths, path reprioritization, delay testing, test quality
34Hechmi Khlifi, Jean-Charles Grégoire Estimation and Removal of Clock Skew From Delay Measures. Search on Bibsonomy LCN The full citation details ... 2004 DBLP  DOI  BibTeX  RDF clock skew, delay measurement
34Jun (Jim) Xu, Richard J. Lipton On fundamental tradeoffs between delay bounds and computational complexity in packet scheduling algorithms. Search on Bibsonomy SIGCOMM The full citation details ... 2002 DBLP  DOI  BibTeX  RDF quality of service, computational complexity, decision tree, packet scheduling, delay bound
34Tatsuhiro Tsuchiya, Masatoshi Yamaguchi, Tohru Kikuno Minimizing the Maximum Delay for Reaching Consensus in Quorum-Based Mutual Exclusion Schemes. Search on Bibsonomy IEEE Trans. Parallel Distributed Syst. The full citation details ... 1999 DBLP  DOI  BibTeX  RDF distributed systems, mutual exclusion, communication delay, Quorums, coteries
34Kartik Gopalan, Tzi-cker Chiueh, Yow-Jian Lin Probabilistic delay guarantees using delay distribution measurement. Search on Bibsonomy ACM Multimedia The full citation details ... 2004 DBLP  DOI  BibTeX  RDF measurement-based, admission control, statistical multiplexing
34Masoud Sharif, Babak Hassibi Delay Considerations for Opportunistic Scheduling in Broadcast Fading Channels. Search on Bibsonomy IEEE Trans. Wirel. Commun. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
34Elaheh Bozorgzadeh, Soheil Ghiasi, Atsushi Takahashi 0001, Majid Sarrafzadeh Optimal integer delay-budget assignment on directed acyclic graphs. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
34Yoon G. Kim, Afshin Shiravi, Paul S. Min Prediction-Based Routing through Least Cost Delay Constraint. Search on Bibsonomy IPDPS The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
34Eun Sei Park, M. Ray Mercer An efficient delay test generation system for combinational logic circuits. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1992 DBLP  DOI  BibTeX  RDF
34Eun Sei Park, M. Ray Mercer An Efficient Delay Test Generation System for Combinational Logic Circuits. Search on Bibsonomy DAC The full citation details ... 1990 DBLP  DOI  BibTeX  RDF
33Youxin Gao, Martin D. F. Wong Wire-sizing optimization with inductance consideration using transmission-line model. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
33Libin Dong, Rami G. Melhem, Daniel Mossé Effect of scheduling jitter on end-to-end delay in TDMA protocols. Search on Bibsonomy RTCSA The full citation details ... 2000 DBLP  DOI  BibTeX  RDF scheduling jitter, TDMA protocols, time slot allocation algorithm, transmission rate, ETE delay bound, simulations, scheduling, distributed system, real-time systems, delays, time division multiple access, time division multiple access, jitter, real time communication, end-to-end delay, packet delay, destination node
33Ping Zhou, Charles Thompson Available Bit Rate (ABR) Source Control and Delay Estimation. Search on Bibsonomy LCN The full citation details ... 2000 DBLP  DOI  BibTeX  RDF nonlinear estimation, ABR source control, transmission rate regulation, ABR traffic source, linear quadratic rate regulation, round-trip propagation delay estimation, nonlinear least mean square, NLMS algorithm, ATM standard, asynchronous transfer mode, ATM network, simulation results, telecommunication traffic, least squares approximations, telecommunication control, delay estimation, delay estimation, available bit rate
33Priyadarsan Patra, Donald S. Fussell Power-efficient delay-insensitive codes for data transmission. Search on Bibsonomy HICSS (1) The full citation details ... 1995 DBLP  DOI  BibTeX  RDF telecommunication switching, power-efficient delay-insensitive codes, dynamic delay-insensitive codes, switching energy optimization, data pins, protocols, delays, power consumption, codes, asynchronous systems, data communication, data communication, data transmission, energy reduction, delay-insensitive circuits
33Erik Burman, Guillaume Delay, Alexandre Ern The Unique Continuation Problem for the Heat Equation Discretized with a High-Order Space-Time Nonconforming Method. Search on Bibsonomy SIAM J. Numer. Anal. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
33Pranoy Roy, Reza Ilka, Jiangbiao He, Yuan Liao, Aaron M. Cramer, Justin Mccann, Samuel Delay, Steven Coley, Melissa Geraghty, Sachindra Dahal Impact of Electric Vehicle Charging on Power Distribution Systems: A Case Study of the Grid in Western Kentucky. Search on Bibsonomy IEEE Access The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
33Sahan Wijethunga, Shehan Kaushalya Senavirathna, Kavishka Dissanayake, Janith Bandara Senanayaka, Eranda Somathilake, Upekha Hansanie Delay, Roshan Indika Godaliyadda, Mervyn Parakrama B. Ekanayake, Janaka V. Wijayakulasooriya IMU-based Modularized Wearable Device for Human Motion Classification. Search on Bibsonomy CoRR The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
33Oleksandr Zaitsev, François Vendel, Etienne Delay Cormas: The Software for Participatory Modelling and its Application for Managing Natural Resources in Senegal. Search on Bibsonomy CoRR The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
33Oleksandr Zaitsev, François Vendel, Etienne Delay Cormas: The Software for Participatory Modelling and Its Application for Managing Natural Resources in Senegal. Search on Bibsonomy Euro-Par Workshops The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
33Eranda Somathilake, Upekha Hansanie Delay, Janith Bandara Senanayaka, Samitha Gunarathne, Roshan Indika Godaliyadda, Mervyn Parakrama B. Ekanayake, Janaka V. Wijayakulasooriya, Chathura Rathnayake Assessment of Fetal and Maternal Well-Being During Pregnancy Using Passive Wearable Inertial Sensor. Search on Bibsonomy IEEE Trans. Instrum. Meas. The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
33Angelos K. Sikalidis, Aleksandra S. Kristo, Scott K. Reaves, Franz J. Kurfess, Ann M. DeLay, Kathryn Vasilaky, Lorraine Donegan Capacity Strengthening Undertaking - Farm Organized Response of Workers against Risk for Diabetes: (C.S.U. - F.O.R.W.A.R.D. with Cal Poly) - A Concept Approach to Tackling Diabetes in Vulnerable and Underserved Farmworkers in California. Search on Bibsonomy Sensors The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
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