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Found 7472 publication records. Showing 7472 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
210Vivek De Leakage-tolerant design techniques for high performance processors. Search on Bibsonomy ISPD The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
186David T. Blaauw, Anirudh Devgan, Farid N. Najm Leakage power: trends, analysis and avoidance. Search on Bibsonomy ASP-DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
101Nikhil Jayakumar, Sunil P. Khatri A Predictably Low-Leakage ASIC Design Style. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
99Ashesh Rastogi, Kunal P. Ganeshpure, Alodeep Sanyal, Sandip Kundu On Composite Leakage Current Maximization. Search on Bibsonomy J. Electron. Test. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Leakage Maximizing Pattern Generation (LMPG), Sub-threshold leakage, Band-To-Band Tunneling (BTBT) leakage, Leakage maximization, Weighted max-satisfiability problem, Branch-and-bound heuristic, Gate leakage
94Puneet Gupta 0001, Andrew B. Kahng, Puneet Sharma, Dennis Sylvester Gate-length biasing for runtime-leakage control. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
94Aseem Gupta, Nikil D. Dutt, Fadi J. Kurdahi, Kamal S. Khouri, Magdy S. Abadir LEAF: A System Level Leakage-Aware Floorplanner for SoCs. Search on Bibsonomy ASP-DAC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF LEAF, leakage-aware floorplanning, temperature-aware leakage power, dynamic power profile, system on chip, SoC designs
93Wei Wang, Yu Hu 0001, Yinhe Han 0001, Xiaowei Li 0001, You-Sheng Zhang Leakage Current Optimization Techniques During Test Based on Don't Care Bits Assignment. Search on Bibsonomy J. Comput. Sci. Technol. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF don’t care bits, minimum leakage vector, leakage power, leakage current
91Nikhil Jayakumar, Sunil P. Khatri An ASIC design methodology with predictably low leakage, using leakage-immune standard cells. Search on Bibsonomy ISLPED The full citation details ... 2003 DBLP  DOI  BibTeX  RDF standby current, leakage current, standard cells, MTCMOS
82Andrew B. Kahng, Sudhakar Muddu, Puneet Sharma Defocus-Aware Leakage Estimation and Control. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
82Jason Helge Anderson, Farid N. Najm Active leakage power optimization for FPGAs. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
82Shengqi Yang, Wayne H. Wolf, Narayanan Vijaykrishnan, Yuan Xie 0001, Wenping Wang Accurate Stacking Effect Macro-Modeling of Leakage Power in Sub-100nm Circuits. Search on Bibsonomy VLSI Design The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
82Jaw-Wei Chi, Chia-Lin Yang, Yi-Jung Chen, Jian-Jia Chen Cache leakage control mechanism for hard real-time systems. Search on Bibsonomy CASES The full citation details ... 2007 DBLP  DOI  BibTeX  RDF cache leakage control policy, hard real-time system
81Geoffrey C.-F. Yeap Leakage current in low standby power and high performance devices: trends and challenges. Search on Bibsonomy ISPD The full citation details ... 2002 DBLP  DOI  BibTeX  RDF gate tunneling leakage, low standby power, off-state sub-threshold leakage, system-on-a-ship (SoC), high performance, CMOS technology, leakage current
79Seongmoo Heo, Kenneth C. Barr, Mark Hampton, Krste Asanovic Dynamic Fine-Grain Leakage Reduction Using Leakage-Biased Bitlines. Search on Bibsonomy ISCA The full citation details ... 2002 DBLP  DOI  BibTeX  RDF Dynamic Leakage Reduction
76Houman Homayoun, Avesta Sasan, Aseem Gupta, Alexander V. Veidenbaum, Fadi J. Kurdahi, Nikil D. Dutt Multiple sleep modes leakage control in peripheral circuits of a all major SRAM-based processor units. Search on Bibsonomy Conf. Computing Frontiers The full citation details ... 2010 DBLP  DOI  BibTeX  RDF multiple sleep mode, peripheral circuits, sram memory, temperature reduction, leakage power
76Ping-Hung Yuh, Chia-Lin Yang, Chi-Feng Li, Chung-Hsiang Lin Leakage-aware task scheduling for partially dynamically reconfigurable FPGAs. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF scheduling, placement, Reconfigurable computing, leakage, partially dynamical reconfiguration
76Po-Yuan Chen, Chiao-Chen Fang, TingTing Hwang, Hsi-Pin Ma Leakage reduction, delay compensation using partition-based tunable body-biasing techniques. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF low-power design, process variations, leakage current, Body biasing
76Wei Zhang 0002, Yuh-Fang Tsai, David Duarte, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin Reducing dynamic and leakage energy in VLIW architectures. Search on Bibsonomy ACM Trans. Embed. Comput. Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF dynamic energy, schedule slacks, compiler, VLIW architecture, leakage energy
76Ashish Kumar Singh, Murari Mani, Ruchir Puri, Michael Orshansky Gain-based technology mapping for minimum runtime leakage under input vector uncertainty. Search on Bibsonomy DAC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF leakage, technology mapping, logical effort
76Andrew B. Kahng, Swamy Muddu, Puneet Sharma Defocus-aware leakage estimation and control. Search on Bibsonomy ISLPED The full citation details ... 2005 DBLP  DOI  BibTeX  RDF ACLV, yield, leakage, lithography
76Amit Agarwal 0001, Chris H. Kim, Saibal Mukhopadhyay, Kaushik Roy 0001 Leakage in nano-scale technologies: mechanisms, impact and design considerations. Search on Bibsonomy DAC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF process variation, leakage current, circuit design
73Rahul M. Rao, Jeffrey L. Burns, Richard B. Brown Analysis and Optimization of Enhanced MTCMOS Scheme. Search on Bibsonomy VLSI Design The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
70Ashesh Rastogi, Kunal P. Ganeshpure, Sandip Kundu A Study on Impact of Leakage Current on Dynamic Power. Search on Bibsonomy ISCAS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
70Kamal S. Khouri, Niraj K. Jha Leakage power analysis and reduction during behavioral synthesis. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
70Hongliang Chang, Sachin S. Sapatnekar Prediction of leakage power under process uncertainties. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF process variation, yield, leakage, Circuit
70Baozhen Yu, Michael L. Bushnell A novel dynamic power cutoff technique (DPCT) for active leakage reduction in deep submicron CMOS circuits. Search on Bibsonomy ISLPED The full citation details ... 2006 DBLP  DOI  BibTeX  RDF power cutoff, standby current, stacking, leakage current, dynamic power
70Stefanos Kaxiras, Polychronis Xekalakis, Georgios Keramidas A simple mechanism to adapt leakage-control policies to temperature. Search on Bibsonomy ISLPED The full citation details ... 2005 DBLP  DOI  BibTeX  RDF hybrid leakage mechanism, thermal adaptation, drowsy cache, cache decay
69Jie Gu 0003, John Keane 0001, Chris H. Kim Modeling and analysis of leakage induced damping effect in low voltage LSIs. Search on Bibsonomy ISLPED The full citation details ... 2006 DBLP  DOI  BibTeX  RDF damping effect, supply noise, gate leakage, subthreshold leakage
67Lei He 0001, Weiping Liao, Mircea R. Stan System level leakage reduction considering the interdependence of temperature and leakage. Search on Bibsonomy DAC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF microarchitecture, leakage power, temperature
67Emrah Acar, Anirudh Devgan, Rahul M. Rao, Ying Liu, Haihua Su, Sani R. Nassif, Jeffrey L. Burns Leakage and leakage sensitivity computation for combinational circuits. Search on Bibsonomy ISLPED The full citation details ... 2003 DBLP  DOI  BibTeX  RDF iddq analysis, sensitivity, power estimation, leakage power
64Hushrav Mogal, Kia Bazargan Microarchitecture floorplanning for sub-threshold leakage reduction. Search on Bibsonomy DATE The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
64Min Ni, Seda Ogrenci Memik Thermal-induced leakage power optimization by redundant resource allocation. Search on Bibsonomy ICCAD The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
64Nam Sung Kim, David T. Blaauw, Trevor N. Mudge Quantitative analysis and optimization techniques for on-chip cache leakage power. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
64Narender Hanchate, Nagarajan Ranganathan A New Technique for Leakage Reduction in CMOS Circuits using Self-Controlled Stacked Transistors. Search on Bibsonomy VLSI Design The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
64Saibal Mukhopadhyay, Cassondra Neau, R. T. Cakici, Amit Agarwal 0001, Chris H. Kim, Kaushik Roy 0001 Gate leakage reduction for scaled devices using transistor stacking. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
64Wenjie Jiang, Vivek Tiwari, Erik de la Iglesia, Amit Sinha Topological Analysis for Leakage Prediction of Digital Circuits. Search on Bibsonomy ASP-DAC/VLSI Design The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
64Michael D. Powell, Se-Hyun Yang, Babak Falsafi, Kaushik Roy 0001, T. N. Vijaykumar Reducing leakage in a high-performance deep-submicron instruction cache. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
64Wei Zhang 0002, Bramha Allu Reducing branch predictor leakage energy by exploiting loops. Search on Bibsonomy ACM Trans. Embed. Comput. Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF compiler, Branch prediction, leakage energy
64Michele Boreale Quantifying Information Leakage in Process Calculi. Search on Bibsonomy ICALP (2) The full citation details ... 2006 DBLP  DOI  BibTeX  RDF information theory, process calculi, secrecy, information leakage
64Yu Wang 0002, Yongpan Liu, Rong Luo, Huazhong Yang, Hui Wang 0004 Two-phase fine-grain sleep transistor insertion technique in leakage critical circuits. Search on Bibsonomy ISLPED The full citation details ... 2006 DBLP  DOI  BibTeX  RDF leakage current reduction, two-phase fine-grain sleep transistor insertion, mixed integer linear programming
64Wei Zhang 0002, Bramha Allu Loop-based leakage control for branch predictors. Search on Bibsonomy CASES The full citation details ... 2004 DBLP  DOI  BibTeX  RDF compiler, branch prediction, leakage energy
64Songqing Zhang, Vineet Wason, Kaustav Banerjee A probabilistic framework to estimate full-chips subthreshold leakage power distribution considering within-die and die-to-die P-T-V variations. Search on Bibsonomy ISLPED The full citation details ... 2004 DBLP  DOI  BibTeX  RDF die-to-die variations, electrothermal couplings, subthreshold leakage power distribution, yield estimation, process variations, within-die variations
64Rajeev R. Rao, Ashish Srivastava, David T. Blaauw, Dennis Sylvester Statistical estimation of leakage current considering inter- and intra-die process variation. Search on Bibsonomy ISLPED The full citation details ... 2003 DBLP  DOI  BibTeX  RDF variability, Monte Carlo, leakage current
64Saibal Mukhopadhyay, Arijit Raychowdhury, Kaushik Roy 0001 Accurate estimation of total leakage current in scaled CMOS logic circuits based on compact current modeling. Search on Bibsonomy DAC The full citation details ... 2003 DBLP  DOI  BibTeX  RDF doping profiles, leakage, tunneling, threshold voltage
64Zhigang Hu, Stefanos Kaxiras, Margaret Martonosi Let caches decay: reducing leakage energy via exploitation of cache generational behavior. Search on Bibsonomy ACM Trans. Comput. Syst. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF generational behavior, Cache memories, leakage power, cache decay
63Tsung-Yi Wu, Jr-Luen Tzeng, Kuang-Yao Chen A Fast Probability-Based Algorithm for Leakage Current Reduction Considering Controller Cost. Search on Bibsonomy ASP-DAC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF MLV controller, probability-based algorithm, leakage current reduction, minimum leakage vector
63Youngsoo Shin, Sewan Heo, Hyung-Ock Kim, Jung Yun Choi Simultaneous Control of Subthreshold and Gate Leakage Current in Nanometer-Scale CMOS Circuits. Search on Bibsonomy ASP-DAC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF gate leakage current, nanometer-scale CMOS circuits, supply switching, ground collapse, standard-cell elements, 45 nm, 65 nm, power gating, subthreshold leakage current, 90 nm
63Amit Agarwal 0001, Kaushik Roy 0001 A noise tolerant cache design to reduce gate and sub-threshold leakage in the nanometer regime. Search on Bibsonomy ISLPED The full citation details ... 2003 DBLP  DOI  BibTeX  RDF diode, low leakage cache, SRAM, gate leakage
63Rahul M. Rao, Jeffrey L. Burns, Anirudh Devgan, Richard B. Brown Efficient techniques for gate leakage estimation. Search on Bibsonomy ISLPED The full citation details ... 2003 DBLP  DOI  BibTeX  RDF pattern-dependent, pattern-independent, estimation, leakage, gate leakage
61Kanupriya Gulati, Sunil P. Khatri, Peng Li 0001 Closed-loop modeling of power and temperature profiles of FPGAs. Search on Bibsonomy FPGA The full citation details ... 2009 DBLP  DOI  BibTeX  RDF sub-threshold leakage, dynamic power
61Kaviraj Chopra, Sarma B. K. Vrudhula Implicit pseudo boolean enumeration algorithms for input vector control. Search on Bibsonomy DAC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF power, CMOS, SAT, binary decision diagrams, leakage, symbolic methods
58Sung Woo Chung, Kevin Skadron On-Demand Solution to Minimize I-Cache Leakage Energy with Maintaining Performance. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Low-power design, Microprocessors, Cache memories, Energy-aware systems
58Yongpan Liu, Robert P. Dick, Li Shang, Huazhong Yang Accurate temperature-dependent integrated circuit leakage power estimation is easy. Search on Bibsonomy DATE The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
58Lin Yuan, Gang Qu 0001 Simultaneous input vector selection and dual threshold voltage assignment for static leakage minimization. Search on Bibsonomy ICCAD The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
58Lin Yuan, Gang Qu 0001 A combined gate replacement and input vector control approach for leakage current reduction. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
58Jun-Cheol Park, Vincent John Mooney III Sleepy Stack Leakage Reduction. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
58Dongwoo Lee, David T. Blaauw, Dennis Sylvester Runtime Leakage Minimization Through Probability-Aware Optimization. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
58Micah G. O'Halloran, Rahul Sarpeshkar An analog storage cell with 5e-/sec leakage. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
58Dongwoo Lee, David T. Blaauw, Dennis Sylvester Static leakage reduction through simultaneous Vt/Tox and state assignment. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
58Shengqi Yang, Wayne H. Wolf, Wenping Wang, Narayanan Vijaykrishnan, Yuan Xie 0001 Low-leakage robust SRAM cell design for sub-100nm technologies. Search on Bibsonomy ASP-DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
58Domenik Helms, Eike Schmidt, Wolfgang Nebel Leakage in CMOS Circuits - An Introduction. Search on Bibsonomy PATMOS The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
58Ge Yang 0004, Zhongda Wang, Sung-Mo Kang Leakage-Proof Domino Circuit Design for Deep Sub-100nm Technologies. Search on Bibsonomy VLSI Design The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
58Se-Hyun Yang, Michael D. Powell, Babak Falsafi, Kaushik Roy 0001, T. N. Vijaykumar An Integrated Circuit/Architecture Approach to Reducing Leakage in Deep-Submicron High-Performance I-Caches. Search on Bibsonomy HPCA The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
58Daniel Eckerbert, Per Larsson-Edefors Cycle-true leakage current modeling for CMOS gates. Search on Bibsonomy ISCAS (5) The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
58Kamal S. Khouri, Niraj K. Jha Leakage Power Analysis and Reduction during Behavioral Synthesis. Search on Bibsonomy ICCD The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
58Zhanping Chen, Mark Johnson, Liqiong Wei, Kaushik Roy 0001 Estimation of standby leakage power in CMOS circuits considering accurate modeling of transistor stacks. Search on Bibsonomy ISLPED The full citation details ... 1998 DBLP  DOI  BibTeX  RDF
58Ruijing Shen, Sheldon X.-D. Tan, Jinjun Xiong A linear statistical analysis for full-chip leakage power with spatial correlation. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2010 DBLP  DOI  BibTeX  RDF statistical leakage analysis, strong and weak correlation, linear, look-up table
58Xiaoming Chen 0003, Yu Wang 0002, Yu Cao 0001, Yuchun Ma, Huazhong Yang Variation-aware supply voltage assignment for minimizing circuit degradation and leakage. Search on Bibsonomy ISLPED The full citation details ... 2009 DBLP  DOI  BibTeX  RDF dynamic vdd scaling, leakage power, negative bias temperature instability (NBTI), dual vdd
58Yuan-Shin Hwang, Jia-Jhe Li Snug set-associative caches: Reducing leakage power of instruction and data caches with no performance penalties. Search on Bibsonomy ACM Trans. Archit. Code Optim. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF Caches, leakage power, drowsy caches, cache decay
58Yifan Zhu, Frank Mueller 0001 DVSleak: combining leakage reduction and voltage scaling in feedback EDF scheduling. Search on Bibsonomy LCTES The full citation details ... 2007 DBLP  DOI  BibTeX  RDF scheduling, real-time systems, dynamic voltage scaling, leakage, feedback control
58Chi-Feng Li, Ping-Hung Yuh, Chia-Lin Yang, Yao-Wen Chang Post-placement leakage optimization for partially dynamically reconfigurable FPGAs. Search on Bibsonomy ISLPED The full citation details ... 2007 DBLP  DOI  BibTeX  RDF post-placement optimization, scheduling, field-programmable gate array, leakage
58Aseem Gupta, Nikil D. Dutt, Fadi J. Kurdahi, Kamal S. Khouri, Magdy S. Abadir Floorplan driven leakage power aware IP-based SoC design space exploration. Search on Bibsonomy CODES+ISSS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF floorplan, leakage power, temperature
58Chengyi Zhang, Hongwei Zhou, Minxuan Zhang, Zuocheng Xing An Architectural Leakage Power Reduction Method for Instruction Cache in Ultra Deep Submicron Microprocessors. Search on Bibsonomy Asia-Pacific Computer Systems Architecture Conference The full citation details ... 2006 DBLP  DOI  BibTeX  RDF Periodically Drowsy Speculative Recover, Adaptive, Leakage Power, Drowsy cache
58Sung Woo Chung, Kevin Skadron Using Branch Prediction Information for Near-Optimal I-Cache Leakage. Search on Bibsonomy Asia-Pacific Computer Systems Architecture Conference The full citation details ... 2006 DBLP  DOI  BibTeX  RDF Low Power, Branch Prediction, Leakage, Instruction Cache, Drowsy Cache
58Zhiyu Liu, Volkan Kursun Leakage current starved domino logic. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2006 DBLP  DOI  BibTeX  RDF gate oxide tunneling, sleep mode, domino logic, subthreshold leakage current, dual threshold voltage
58Zhiyu Liu, Volkan Kursun Leakage Biased Sleep Switch Domino Logic. Search on Bibsonomy ISQED The full citation details ... 2006 DBLP  DOI  BibTeX  RDF gate oxide tunneling, sleep mode, Domino logic, subthreshold leakage current, dual threshold voltage
58Yan Meng, Timothy Sherwood, Ryan Kastner Leakage power reduction of embedded memories on FPGAs through location assignment. Search on Bibsonomy DAC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF location assignment, leakage power, embedded memory
58Nasir Mohyuddin, Rashed Zafar Bhatti, Michel Dubois 0001 Controlling leakage power with the replacement policy in slumberous caches. Search on Bibsonomy Conf. Computing Frontiers The full citation details ... 2005 DBLP  DOI  BibTeX  RDF tranquility level, leakage power, replacement policy, drowsy cache
58Robert Bai, Nam Sung Kim, Dennis Sylvester, Trevor N. Mudge Total leakage optimization strategies for multi-level caches. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2005 DBLP  DOI  BibTeX  RDF low power, cache memory, gate leakage
58Nikhil Jayakumar, Sandeep Dhar, Sunil P. Khatri A self-adjusting scheme to determine the optimum RBB by monitoring leakage currents. Search on Bibsonomy DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF leakage power, self-adjusting, body-biasing
58Rahul M. Rao, Kanak Agarwal, Dennis Sylvester, Richard B. Brown, Kevin J. Nowka, Sani R. Nassif Approaches to run-time and standby mode leakage reduction in global buses. Search on Bibsonomy ISLPED The full citation details ... 2004 DBLP  DOI  BibTeX  RDF pulsed buses, leakage, repeaters, MTCMOS
58Stefanos Kaxiras, Polychronis Xekalakis 4T-decay sensors: a new class of small, fast, robust, and low-power, temperature/leakage sensors. Search on Bibsonomy ISLPED The full citation details ... 2004 DBLP  DOI  BibTeX  RDF 4T SRAM, architecture, sensor, leakage, temperature
58Vishal Khandelwal, Ankur Srivastava 0001 Active mode leakage reduction using fine-grained forward body biasing strategy. Search on Bibsonomy ISLPED The full citation details ... 2004 DBLP  DOI  BibTeX  RDF forward body biasing, leakage power optimization
58Rajeev R. Rao, Anirudh Devgan, David T. Blaauw, Dennis Sylvester Parametric yield estimation considering leakage variability. Search on Bibsonomy DAC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF variability, leakage, parametric yield
58Anup Kumar Sultania, Dennis Sylvester, Sachin S. Sapatnekar Tradeoffs between date oxide leakage and delay for dual Tox circuits. Search on Bibsonomy DAC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF dual Tox circuits, leakage power
58Ashish Srivastava, Robert Bai, David T. Blaauw, Dennis Sylvester Modeling and analysis of leakage power considering within-die process variations. Search on Bibsonomy ISLPED The full citation details ... 2002 DBLP  DOI  BibTeX  RDF variability, Monte Carlo, leakage current
57Lawrence T. Clark, Rakesh Patel, Timothy S. Beatty Managing standby and active mode leakage power in deep sub-micron design. Search on Bibsonomy ISLPED The full citation details ... 2004 DBLP  DOI  BibTeX  RDF SRAM leakage control, TGSRAM, battery lifetime, drowsy mode, thick gate shadow latch, transistor leakage, MTCMOS
57Cassondra Neau, Kaushik Roy 0001 Optimal body bias selection for leakage improvement and process compensation over different technology generations. Search on Bibsonomy ISLPED The full citation details ... 2003 DBLP  DOI  BibTeX  RDF band-to-band tunneling, leakage components, process compensation, substrate bias, process variation, leakage current, CMOS scaling, body bias
57Benton H. Calhoun, Frank Honoré, Anantha P. Chandrakasan Design methodology for fine-grained leakage control in MTCMOS. Search on Bibsonomy ISLPED The full citation details ... 2003 DBLP  DOI  BibTeX  RDF fine-grain sleep regions, sneak leakage, low power, design methodology, leakage, circuit design, sleep mode, MTCMOS
55Amit Agarwal 0001, Kunhyuk Kang, Swarup Bhunia, James D. Gallagher, Kaushik Roy 0001 Device-Aware Yield-Centric Dual-Vt Design Under Parameter Variations in Nanoscale Technologies. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
55Chris H. Kim, Steven Hsu, Ram Krishnamurthy 0001, Shekhar Borkar, Kaushik Roy 0001 Self Calibrating Circuit Design for Variation Tolerant VLSI Systems. Search on Bibsonomy IOLTS The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
55Maziar Goudarzi, Tohru Ishihara, Hamid Noori Variation-Aware Software Techniques for Cache Leakage Reduction Using Value-Dependence of SRAM Leakage Due to Within-Die Process Variation. Search on Bibsonomy HiPEAC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF process variation, cache memory, Leakage power, power reduction
54Debasis Samanta, Ajit Pal Synthesis of Dual-VT Dynamic CMOS Circuits. Search on Bibsonomy VLSI Design The full citation details ... 2003 DBLP  DOI  BibTeX  RDF nora logic, unate decomposition, low power, Logic synthesis, high performance, leakage power, domino logic, dynamic circuits, dual-VT
52Duk-Hyung Lee, Dong-Kone Kwak, Kyeong-Sik Min Comparative Study on SRAMs for Suppressing Both Oxide-Tunneling Leakage and Subthreshold Leakage in Sub-70-nm Leakage Dominant VLSIs. Search on Bibsonomy VLSI Design The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
52Ruijing Shen, Sheldon X.-D. Tan, Jinjun Xiong A linear algorithm for full-chip statistical leakage power analysis considering weak spatial correlation. Search on Bibsonomy DAC The full citation details ... 2010 DBLP  DOI  BibTeX  RDF statistical analysis, spatial correlation, dynamic power
52Hassan Hassan 0001, Mohab Anis, Mohamed I. Elmasry Input Vector Reordering for Leakage Power Reduction in FPGAs. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
52Jun Seomun, Jae-Hyun Kim, Youngsoo Shin Skewed Flip-Flop and Mixed-Vt Gates for Minimizing Leakage in Sequential Circuits. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
52Puneet Gupta 0001, Andrew B. Kahng, Youngmin Kim, Dennis Sylvester Self-Compensating Design for Reduction of Timing and Leakage Sensitivity to Systematic Pattern-Dependent Variation. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
52Xiaoji Ye, Yaping Zhan, Peng Li 0001 Statistical Leakage Power Minimization Using Fast Equi-Slack Shell Based Optimization. Search on Bibsonomy DAC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
52Rajeev R. Rao, Anirudh Devgan, David T. Blaauw, Dennis Sylvester Analytical yield prediction considering leakage/performance correlation. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
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