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Publication years (Num. hits)
1984-2001 (21) 2002-2003 (31) 2004 (24) 2005-2006 (33) 2007 (16) 2008 (20) 2009 (17) 2010 (16) 2011-2012 (26) 2013-2014 (25) 2015-2016 (20) 2017-2018 (16) 2019-2020 (16) 2021-2024 (13)
Publication types (Num. hits)
article(198) inproceedings(95) phdthesis(1)
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Found 294 publication records. Showing 294 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
74Chih-Yang Peng, Wen-Chang Chao, Yao-Wen Chang, Jyh-Herng Wang Simultaneous block and I/O buffer floorplanning for flip-chip design. Search on Bibsonomy ASP-DAC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
67Xiaodong Liu 0018, Yifan Zhang, Gary K. Yeap, Chunlei Chu, Jian Sun 0005, Xuan Zeng 0001 Global routing and track assignment for flip-chip designs. Search on Bibsonomy DAC The full citation details ... 2010 DBLP  DOI  BibTeX  RDF flip-chip, track assignment, voronoi diagram, global routing
62Cheng-Yu Wang, Wai-Kei Mak Signal skew aware floorplanning and bumper signal assignment technique for flip-chip. Search on Bibsonomy ASP-DAC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
58Chia-Yi Chang, Hung-Ming Chen Design Migration From Peripheral ASIC Design to Area-I/O Flip-Chip Design by Chip I/O Planning and Legalization. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
56Jia-Wei Fang, Yao-Wen Chang Area-I/O flip-chip routing for chip-package co-design. Search on Bibsonomy ICCAD The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
53Jin-Tai Yan, Zhi-Wei Chen RDL pre-assignment routing for flip-chip designs. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2009 DBLP  DOI  BibTeX  RDF RDL routing, flip-chip design, routability, wirelength
44Jia-Wei Fang, Chin-Hsiung Hsu, Yao-Wen Chang An Integer-Linear-Programming-Based Routing Algorithm for Flip-Chip Designs. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
44Jia-Wei Fang, I-Jye Lin, Yao-Wen Chang, Jyh-Herng Wang A Network-Flow-Based RDL Routing Algorithmz for Flip-Chip Design. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
44Jia-Wei Fang, Chin-Hsiung Hsu, Yao-Wen Chang An Integer Linear Programming Based Routing Algorithm for Flip-Chip Design. Search on Bibsonomy DAC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
41XiaoLi Da, Guangdi Shen, Chen Xu, DeShu Zou, YanXu Zhu, Jia Zhang Investigation of high extraction efficiency flip-chip GaN-based light-emitting diodes. Search on Bibsonomy Sci. China Ser. F Inf. Sci. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF GaN, light emitting diodes, SiO2/SiN x dielectric film reflectors, plasma enhanced chemical vapor deposition
41Ren-Jie Lee, Ming-Fang Lai, Hung-Ming Chen Fast Flip-Chip Pin-Out Designation Respin by Pin-Block Design and Floorplanning for Package-Board Codesign. Search on Bibsonomy ASP-DAC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
38Woo Hyung Lee, Sanjay Pant, David T. Blaauw Analysis and Reduction of On-Chip Inductance Effects in Power Supply Grids. Search on Bibsonomy ISQED The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
38Y. P. Wu, M. O. Alam, Yan Cheong Chan, B. Y. Wu Dynamic strength of anisotropic conductive joints in flip chip on glass and flip chip on flex packages. Search on Bibsonomy Microelectron. Reliab. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
36Hung-Ming Chen, I-Min Liu, Martin D. F. Wong I/O Clustering in Design Cost and Performance Optimization for Flip-Chip Design. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
36Hung-Ming Chen, I-Min Liu, Martin D. F. Wong, Muzhou Shao, Li-Da Huang I/O Clustering in Design Cost and Performance Optimization for Flip-Chip Design. Search on Bibsonomy ICCD The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
36Janet Meiling Wang, Kishore Kumar Muchherla, Jai Ganesh Kumar A Clustering Based Area I/O Planning for Flip-Chip Technology. Search on Bibsonomy ISQED The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
33Kari Stadius, Kari Halonen Development of 4-GHz flip-chip VCO module. Search on Bibsonomy ISCAS (3) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
33Eli Chiprout Fast flip-chip power grid analysis via locality and grid shells. Search on Bibsonomy ICCAD The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
33Mario Paniccia, Travis M. Eiles, V. R. M. Rao, Wai Mun Yee Novel optical probing technique for flip chip packaged microprocessors. Search on Bibsonomy ITC The full citation details ... 1998 DBLP  DOI  BibTeX  RDF
32Tymon Barwicz, Swetha Kamlapurkar, Yves Martin, Robert L. Bruce, Sebastian Engelmann A silicon metamaterial chip-to-chip coupler for photonic flip-chip applications. Search on Bibsonomy OFC The full citation details ... 2017 DBLP  BibTeX  RDF
32Theresa Sze, Darko Popovic, Jing Shi, Yi-Shao Lai, James G. Mitchell, Bruce Guenin, Tsung-Yueh Tsai, Chin-Li Kao, Matthew Giere Early experience with in situ chip-to-chip alignment characterization of Proximity Communication flip-chip package. Search on Bibsonomy Microelectron. Reliab. The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
31Ming-Fang Lai, Hung-Ming Chen An Implementation of Performance-Driven Block and I/O Placement for Chip-Package Codesign. Search on Bibsonomy ISQED The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Chip-Package Codesign, I/O Placement, Power Integrity
30Jin-Tai Yan, Zhi-Wei Chen IO connection assignment and RDL routing for flip-chip designs. Search on Bibsonomy ASP-DAC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
30Jia-Wei Fang, Martin D. F. Wong, Yao-Wen Chang Flip-chip routing with unified area-I/O pad assignments for package-board co-design. Search on Bibsonomy DAC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF physical design, global routing, detailed routing
30Hao-Yueh Hsieh, Ting-Chi Wang Simple yet effective algorithms for block and I/O buffer placement in flip-chip design. Search on Bibsonomy ISCAS (2) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
30Roderick P. Cruz Flip Chip Advanced Package Solder Joint Embrittlement Fault Isolation Using TDR. Search on Bibsonomy ISQED The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
28Rishi Bhooshan Novel and Efficient IR-Drop Models for Designing Power Distribution Network for Sub-100nm Integrated Circuits. Search on Bibsonomy ISQED The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
26Andrey V. Mezhiba, Eby G. Friedman Scaling trends of on-chip Power distribution noise. Search on Bibsonomy SLIP The full citation details ... 2002 DBLP  DOI  BibTeX  RDF technology scaling, power supply noise, power distribution
25Takuya Wadatsumi, Kohei Kawai, Rikuu Hasegawa, Kikuo Muramatsu, Hiromu Hasegawa, Takuya Sawada, Takahito Fukushima, Hisashi Kondo, Takuji Miki, Makoto Nagata Experimental Exploration of the Backside ESD Impacts on an IC Chip in Flip Chip Packaging. Search on Bibsonomy IEICE Trans. Electron. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
25Takuya Wadatsumi, Kohei Kawai, Rikuu Hasegawa, Takuji Miki, Makoto Nagata, Kikuo Muramatsu, Hiromu Hasegawa, Takuya Sawada, Takahito Fukushima, Hisashi Kondo Voltage Surges by Backside ESD Impacts on IC Chip in Flip Chip Packaging. Search on Bibsonomy IRPS The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
25Lev Kirischian, Valeri Kirischian, Dimple Sharma Mitigation of Thermo-cycling effects in Flip-chip FPGA-based Space-borne Systems by Cyclic On-chip Task Relocation. Search on Bibsonomy AHS The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
25Lin Lin, Jun Wang, Lei Wang, Wenqi Zhang The stress analysis and parametric studies for the low-k layers of a chip in the flip-chip process. Search on Bibsonomy Microelectron. Reliab. The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
25Kyung-Woon Jang, Jin-Hyoung Park, Soon-Bok Lee, Kyung-Wook Paik A study on thermal cycling (T/C) reliability of anisotropic conductive film (ACF) flip chip assembly for thin chip-on-board (COB) packages. Search on Bibsonomy Microelectron. Reliab. The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
25Sheldon Logan, Matthew R. Guthaus Package-chip co-design to increase flip-chip C4 reliability. Search on Bibsonomy ISQED The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
25Jia-Wei Fang, Yao-Wen Chang Area-I/O Flip-Chip Routing for Chip-Package Co-Design Considering Signal Skews. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
25Changsoo Jang, Seongyoung Han, Hangyu Kim, Sayoon Kang A numerical failure analysis on lead breakage issues of ultra fine pitch flip chip-on-flex and tape carrier packages during chip/film assembly process. Search on Bibsonomy Microelectron. Reliab. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
25Takashi Tokuda, Masayuki Kawada, Sachie Sugitani, Mari Taniyama, Akihiro Uehara, Keiichiro Kagawa, Masahiro Nunoshita, Jun Ohta A multi-chip-architecture based flexible stimulation device for retinal prosthesis with a flip-chip packaging technique. Search on Bibsonomy EMBC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
25Ovidiu Vermesan, Knut H. Riisnæs, Laurent Le Pailleur, Jon B. Nysæther, Mark Bauge, Helge Rustad, Sigmund Clausen, Lars-Cyril Julin Blystad, Hanne Grindvoll, Rune Pedersen, Robert Pezzani, David Kaire A 500-dpi AC capacitive hybrid flip-chip CMOS ASIC/sensor module for fingerprint, navigation, and pointer detection with on-chip data processing. Search on Bibsonomy IEEE J. Solid State Circuits The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
25C. F. Luk, Y. C. Chan, K. C. Hung Development of gold to gold interconnection flip chip bonding for chip on suspension assemblies. Search on Bibsonomy Microelectron. Reliab. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
25Giulio Di Giacomo, Stefano Oggioni Reliability of Flip Chip Applications with Ceramic and Organic Chip Carriers. Search on Bibsonomy Microelectron. Reliab. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
25Greg Hotchkiss, Gonzalo Amador, Darvin Edwards, Paul Hundt, Les Stark, Roger Stierman, Gail Heinen Wafer level packaging of a tape flip-chip chip scale packages. Search on Bibsonomy Microelectron. Reliab. The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
25Yutaka Kumano, Yoshihiro Tomura, Minehiro Itagaki, Yoshihiro Bessho Development of chip-on-flex using SBB flip-chip technology. Search on Bibsonomy Microelectron. Reliab. The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
25Rishi Bhooshan, Bindu P. Rao Optimum IR drop models for estimation of metal resource requirements for power distribution network. Search on Bibsonomy VLSI-SoC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
23Kaushik Sheth, Egino Sarto, Joel McGrath The importance of adopting a package-aware chip design flow. Search on Bibsonomy DAC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF RDL, flip chip, routing, concurrent, prototyping, synthesis, exploration, co-design, I/O, package, chip, substrate
23Rui Shi 0003, Chung-Kuan Cheng Efficient escape routing for hexagonal array of high density I/Os. Search on Bibsonomy DAC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF BGA, flip chip, hexagonal array, escape routing
23Chandra Tan, Donald W. Bouldin, Peyman H. Dehkordi Design Implementation of Intrinsic Area Array ICs. Search on Bibsonomy ARVLSI The full citation details ... 1997 DBLP  DOI  BibTeX  RDF Area-array pad, flip-chip, physical design, VLSI design, placement and routing
23Peter Sandborn, Rajarshi Ghosh, Ken Drake, Magdy S. Abadir, Linda Bal, Ashish Parikh Multichip systems trade-off analysis tool. Search on Bibsonomy J. Electron. Test. The full citation details ... 1994 DBLP  DOI  BibTeX  RDF flip chip bonding, multichip module (MCM), packaging and interconnect, Conceptual design, trade-off analysis
23Meigen Shen, Li-Rong Zheng 0001, Esa Tjukanoff, Jouni Isoaho, Hannu Tenhunen Concurrent Chip Package Design for Global Clock Distribution Network Using Standing Wave Approach. Search on Bibsonomy ISQED The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
22Jun Ohta, Takahashi Tokuda, Keiichiro Kagawa, Akihiro Uehara, Yasuo Terasawa, Kazuaki Nakauchi, Takashi Fujikado, Yasuo Tano A multi-microchip retinal stimulator for in vitro / in vivo experiments. Search on Bibsonomy ISCAS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
20Aishwarya Dubey P/G Pad Placement Optimization: Problem Forumulation for Best IR Drop. Search on Bibsonomy ISQED The full citation details ... 2005 DBLP  DOI  BibTeX  RDF P/G (Power/Ground) pad placement, current sink, package resistance, package inductance, IR drop
20Qing Zhu, Wayne Wei-Ming Dai Planar clock routing for high performance chip and package co-design. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 1996 DBLP  DOI  BibTeX  RDF
19Yaofeng Yi, Toshimasa Umezawa, Kouichi Akahane, Tetsuya Kawanishi Thermal Study for High-Photocurrent Photodetector in Non-Saturation Region Using Thin Substrate, Thin Absorber, and Flip- Chip Bonding Process. Search on Bibsonomy IEEE Access The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
19Yu Sun, Lei Su 0002, Jiefei Gu, Ke Li, Michael G. Pecht A Novel Three-Probability Spaces Logic Decoupling Distillation for Flip-Chip Defect Detection. Search on Bibsonomy IEEE Trans. Instrum. Meas. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Lanxiang Xiao, Lei Chen 0001, Fengwei An An 11.6aF/kPa Mechanical Stress Sensor With 0.808% Temperature-Drift Oscillator for Flip-Chip Packaging. Search on Bibsonomy IEEE Trans. Circuits Syst. II Express Briefs The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Toshiki Kishi, Munehiko Nagatani, Shigeru Kanazawa, Kota Shikama, Takuro Fujii, Hidetaka Nishi, Tadashi Minotani, Norio Sato, Toru Segawa, Shinji Matsuo 30-Gbps/ch x 4 ch Simultaneous Error-Free Transmission with A Low-Power Transmitter Flip-Chip-Bonded 1.3-μm LD-Array-on-Si. Search on Bibsonomy OFC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Naseem, Nan-Wei Chen, Syed Hasan Parvez, Zohauddin Ahmad, Sean Yang, H.-S. Chen, Hsiang-Szu Chang, Jack Jia-Sheng Huang, Jin-Wei Shi Enhancement of Bandwidth-Responsivity Product in High-Speed Avalanche Photodiodes with Optimized Flip-Chip Bonding Package for Coherent Detection. Search on Bibsonomy OFC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Jiedong Li, Hui Tang 0003, Zhongyuan Zhu, Sifeng He, Jian Gao 0002, Yunbo He, Xin Chen 0005 Hybrid Position/Force Fully Closed-Loop Control of a Flip-Chip Soft-Landing Bonding System. Search on Bibsonomy IEEE Trans. Ind. Electron. The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Pragya Laad "High Five": Arm's first 5nm Silicon in flip-chip! Search on Bibsonomy SOCC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Szu-Ru Nie, Yen-Ting Chen, Yao-Wen Chang Y-architecture-based flip-chip routing with dynamic programming-based bend minimization. Search on Bibsonomy DAC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Sifeng He, Hui Tang 0003, Kaifu Zhang, Chuangbin Chen, Jianglin Wang, Zhongyuan Zhu, Jian Gao 0002, Chengqiang Cui, Xin Chen 0005 A Flip-Chip Alignment System With the Property of Deviation Self-Correction at the Nanoscale. Search on Bibsonomy IEEE Trans. Ind. Electron. The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
19Chunkyun Seok, Oluwafemi Joel Adelegan, Ali Önder Biliroglu, Feysel Yalcin Yamaner, Ömer Oralkan A Wearable Ultrasonic Neurostimulator - Part II: A 2D CMUT Phased Array System With a Flip-Chip Bonded ASIC. Search on Bibsonomy IEEE Trans. Biomed. Circuits Syst. The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
19Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor An End-to-End Bitstream Tamper Attack Against Flip-Chip FPGAs. Search on Bibsonomy IACR Cryptol. ePrint Arch. The full citation details ... 2021 DBLP  BibTeX  RDF
19Takuji Miki, Makoto Nagata, Hiroki Sonoda, Noriyuki Miura, Takaaki Okidono, Yuuki Araga, Naoya Watanabe, Haruo Shimamoto, Katsuya Kikuchi Si-Backside Protection Circuits Against Physical Security Attacks on Flip-Chip Devices. Search on Bibsonomy IEEE J. Solid State Circuits The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
19Haiyang Xia, Tao Zhang 0086, Lianming Li, Fu-Chun Zheng A 1 × 2 Taper Slot Antenna Array With Flip-Chip Interconnect via Glass-IPD Technology for 60 GHz Radar Sensors. Search on Bibsonomy IEEE Access The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
19Zelong Wu, Hui Tang 0003, Zhaoyang Feng, Weimin Wang, Sifeng He, Jian Gao 0002, Xin Chen 0005, Yunbo He, Xun Chen 0002 A Novel Self-Feedback Intelligent Vision Measure for Fast and Accurate Alignment in Flip-Chip Packaging. Search on Bibsonomy IEEE Trans. Ind. Informatics The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
19Taiki Uemura, Byungjin Chung, Jeongmin Jo, Hai Jiang 0005, Yongsung Ji, Tae-Young Jeong, Rakesh Ranjan, Seungbae Lee, Hwasung Rhee, Sangwoo Pae, Euncheol Lee, Jaehee Choi, Shota Ohnishi, Ken Machida Backside Alpha-Irradiation Test in Flip-Chip Package in EUV 7 nm FinFET SRAM. Search on Bibsonomy IRPS The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
19Serguei Stoukatch, Nicolas André, Thibault P. Delhaye, François Dupont, Jean-Michel Redouté, Denis Flandre Anisotropic conductive film & flip-chip bonding for low-cost sensor prototyping on rigid & flex PCB. Search on Bibsonomy IEEE SENSORS The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
19Andrew Townley, Nima Baniasadi, Sashank Krishnamurthy, Constantine Sideris, Ali Hajimiri, Elad Alon, Ali M. Niknejad A Fully Integrated, Dual Channel, Flip Chip Packaged 113 GHz Transceiver in 28nm CMOS supporting an 80 Gb/s Wireless Link. Search on Bibsonomy CICC The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
19Toshiki Kishi, Munehiko Nagatani, Shigeru Kanazawa, Kota Shikama, Takuro Fujii, Hidetaka Nishi, Hiroshi Yamazaki, Norio Sato, Hideyuki Nosaka, Shinji Matsuo A 0.57-mW/Gbps, 2ch × 53-Gbps Low-Power PAM4 Transmitter Front-End Flip-Chip-Bonded 1.3-µm LD-Array-on-Si. Search on Bibsonomy OFC The full citation details ... 2020 DBLP  BibTeX  RDF
19Sensen Li, Taiyun Chi, Jong Seok Park, Huy Thong Nguyen, Hua Wang 0006 A 28-GHz Flip-Chip Packaged Chireix Transmitter With On-Antenna Outphasing Active Load Modulation. Search on Bibsonomy IEEE J. Solid State Circuits The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
19Guanghua Wu, Meixian Jiang Study on the Interfacial Residual Stress of Flip-Chip Joints Based on Anisotropic Conductive Adhesive. Search on Bibsonomy IEEE Access The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
19Chun-Hsing Li, Te-Yen Chiu Single Flip-Chip Packaged Dielectric Resonator Antenna for CMOS Terahertz Antenna Array Gain Enhancement. Search on Bibsonomy IEEE Access The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
19Tao-Chun Yu, An-Jie Shih, Shao-Yun Fang Flip-Chip Routing With I/O Planning Considering Practical Pad Assignment Constraints. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
19Shigeru Kanazawa, Hiroshi Yamazaki, Yuta Ueda, Wataru Kobayashi, Yoshihiro Ogiso, Johsuke Ozaki, Takahiko Shindo, Satoshi Tsunashima, Hiromasa Tanobe, Atsushi Araratake High-Frequency and Integrated Design Based on Flip-Chip Interconnection Technique (Hi-FIT) for High-Speed (>100 Gbaud) Optical Devices. Search on Bibsonomy IEICE Trans. Electron. The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
19Shunli Ma, Hao Yu 0001, Qun Jane Gu, Junyan Ren A 5-10-Gb/s 12.5-mW Source Synchronous I/O Interface With 3-D Flip Chip Package. Search on Bibsonomy IEEE Trans. Circuits Syst. I Regul. Pap. The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
19Zhuo-Jie Wu, Manish Nayini, Charles Carey, Samantha Donovan, David Questad, Edmund D. Blackshear CPI Reliability Challenges of Large Flip Chip Packages and Effects of Kerf Size and Substrate. Search on Bibsonomy IRPS The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
19Yu-Hsuan Chang, Hsiang-Ting Wen, Yao-Wen Chang Obstacle-Aware Group-Based Length-Matching Routing for Pre-Assignment Area-I/O Flip-Chip Designs. Search on Bibsonomy ICCAD The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
19Takuji Miki, Makoto Nagata, Hiroki Sonoda, Noriyuki Miura, Takaaki Okidono, Yuuki Araga, Naoya Watanabe, Haruo Shimamoto, Katsuya Kikuchi A Si-Backside Protection Circuits Against Physical Security Attacks on Flip-Chip Devices. Search on Bibsonomy A-SSCC The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
19Kerim Kibaroglu, Mustafa Sayginer, Gabriel M. Rebeiz A Low-Cost Scalable 32-Element 28-GHz Phased Array Transceiver for 5G Communication Links Based on a 2×2 Beamformer Flip-Chip Unit Cell. Search on Bibsonomy IEEE J. Solid State Circuits The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
19Junhui Li, Qing Tian, Haoliang Zhang, Xinxin Chen, Xiaohe Liu, Wenhui Zhu Study on Dipping Mathematical Models for the Solder Flip-Chip Bonding in Microelectronics Packaging. Search on Bibsonomy IEEE Trans. Ind. Informatics The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
19Lisa Mitterhuber, Stefan Defregger, Julien Magnien, Jördis Rosc, René Hammer, Lena Goullon, Matthias Hutter, Franz Schrank, Stefan Hörth, Elke Kraker Thermal transient measurement and modelling of a power cycled flip-chip LED module. Search on Bibsonomy Microelectron. Reliab. The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
19Melina Lofrano, Vladimir Cherman, Mario Gonzalez, Eric Beyne Enhanced Cu pillar design to reduce thermomechanical stress induced during flip chip assembly. Search on Bibsonomy Microelectron. Reliab. The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
19Jiajie Fan, Jianwu Cao, Chaohua Yu, Cheng Qian 0003, Xuejun Fan, Guoqi Zhang A design and qualification of LED flip Chip-on-Board module with tunable color temperatures. Search on Bibsonomy Microelectron. Reliab. The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
19Fei Chong Ng, Aizat Abas, Mohd Zulkifly Abdullah Effect of solder bump shapes on underfill flow in flip-chip encapsulation using analytical, numerical and PIV experimental approaches. Search on Bibsonomy Microelectron. Reliab. The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
19Julien Magnien, Lisa Mitterhuber, Jördis Rosc, Franz Schrank, Stefan Hörth, Matthias Hutter, Stefan Defregger, Elke Kraker Parameter driven monitoring for a flip-chip LED module under power cycling condition. Search on Bibsonomy Microelectron. Reliab. The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
19Tao-Chun Yu, Shao-Yun Fang Flip-chip routing with IO planning considering practical pad assignment constraints. Search on Bibsonomy ASP-DAC The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
19Takeshi Matsumoto, Teruo Kurahashi, Ryotaro Konoike, Ken Tanizawa, Keijiro Suzuki, Ayahito Uetake, Kazumasa Takabayashi, Kazuhiro Ikeda, Hitoshi Kawashima, Suguru Akiyama, Shigeaki Sekiguchi In-line Optical Amplification for Silicon Photonics Platform by Flip-Chip Bonded InP-SOAs. Search on Bibsonomy OFC The full citation details ... 2018 DBLP  BibTeX  RDF
19Toshiki Kishi, Munehiko Nagatani, Shigeru Kanazawa, Shinsuke Nakano, Hiroaki Katsurai, Takuro Fujii, Hidetaka Nishi, Takaaki Kakitsuka, Koichi Hasebe, Kota Shikama, Yuko Kawajiri, Atsushi Aratake, Hideyuki Nosaka, Hiroshi Fukuda, Shinji Matsuo A 137-mW, 4 ch × 25-Gbps Low-Power Compact Transmitter Flip-Chip-Bonded 1.3-μm LD-Array-on-Si. Search on Bibsonomy OFC The full citation details ... 2018 DBLP  BibTeX  RDF
19Saqib A. Khan, Chul Seung Lim, GeunYong Bak, Sanghyeon Baeg, Soonyoung Lee An alternative approach to measure alpha-particle-induced SEU cross-section for flip-chip packaged SRAM devices: High energy alpha backside irradiation. Search on Bibsonomy Microelectron. Reliab. The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
19Vincenzo d'Alessandro, Antonio Pio Catalano, Alessandro Magnani, Lorenzo Codecasa, Niccolò Rinaldi, Brian Moser, Peter J. Zampardi Simulation comparison of InGaP/GaAs HBT thermal performance in wire-bonding and flip-chip technologies. Search on Bibsonomy Microelectron. Reliab. The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
19Julien Magnien, Lisa Mitterhuber, Jördis Rosc, Franz Schrank, Stefan Hörth, Lena Goullon, Matthias Hutter, Stefan Defregger, Elke Kraker Reliability and failure analysis of solder joints in flip chip LEDs via thermal impedance characterisation. Search on Bibsonomy Microelectron. Reliab. The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
19Ari Laor, Depayne Athia, Alireza Rezvani, Horst Clauberg, Michael Mayer Monitoring of thermo-mechanical stress via CMOS sensor array: Effects of warpage and tilt in flip chip thermo-compression bonding. Search on Bibsonomy Microelectron. Reliab. The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
19Jin-Tai Yan Performance-Driven Assignment of Buffered I/O Signals in Area-I/O Flip-Chip Designs. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
19Shrikant Swaminathan, Kamal K. Sikka, Richard F. Indyk, Tuhin Sinha Measurement of underfill interfacial and bulk fracture toughness in flip-chip packages. Search on Bibsonomy Microelectron. Reliab. The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
19Hongjun Ji, Jiao Wang, Mingyu Li Microstructure and reliability of hybrid interconnects by Au stud bump with Sn-0.7Cu solder for flip chip power device packaging. Search on Bibsonomy Microelectron. Reliab. The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
19Brett Fennell, Sangil Lee, Daniel F. Baldwin Rotational solder self-alignment mechanics modeling for a flip chip in the presence of a viscous fluid. Search on Bibsonomy Microelectron. Reliab. The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
19Saqib A. Khan, Shi-Jie Wen, Sanghyeon Baeg Assessing alpha-particle-induced SEU sensitivity of flip-chip bonded SRAM using high energy irradiation. Search on Bibsonomy IEICE Electron. Express The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
19Saqib A. Khan, Shi-Jie Wen, Sanghyeon Baeg Erratum: Assessing alpha-particle-induced SEU sensitivity of flip-chip bonded SRAM using high energy irradiation [IEICE Electronics Express Vol. 13 (2016) No. 17 pp. 20160627]. Search on Bibsonomy IEICE Electron. Express The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
19Nathaniel Ross Pinckney, Dennis Sylvester, David T. Blaauw Supply boosting for high-performance processors in flip-chip packages. Search on Bibsonomy ESSCIRC The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
19Takeshi Matsumoto, Teruo Kurahashi, Ken Tanizawa, Keijiro Suzuki, Ayahito Uetake, Kazumasa Takabayashi, Kazuhiro Ikeda, Hitoshi Kawashima, Suguru Akiyama In-line optical amplification for Si waveguides on 1×8 splitter and selector by flip-chip bonded InP-SOAs. Search on Bibsonomy OFC The full citation details ... 2016 DBLP  BibTeX  RDF
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