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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 300 occurrences of 168 keywords
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Results
Found 748 publication records. Showing 748 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
101 | Andrzej J. Strojwas, Tejas Jhaveri, Vyacheslav Rovner, Lawrence T. Pileggi |
Creating an affordable 22nm node using design-lithography co-optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 95-96, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
design technology co-optimization, templates, DFM, regular fabric |
89 | David Z. Pan |
Lithography friendly routing: from construct-by-correction to correct-by-construction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2008, Gramado, Brazil, September 1-4, 2008, pp. 6, 2008, ACM, 978-1-60558-231-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
routing |
84 | B. D. Cook, Soo-Young Lee |
Fast exposure simulation for large circuit patterns in electron beam lithography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIP ![In: Proceedings 1995 International Conference on Image Processing, Washington, DC, USA, October 23-26, 1995, pp. 442-445, 1995, IEEE Computer Society, 0-8186-7310-9. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
electron beam lithography, proximity effect (lithography), fast exposure simulation, large circuit patterns, electron beam lithography, global exposure, local exposure, proximity effect, simulation |
83 | Tai-Chen Chen, Guang-Wan Liao, Yao-Wen Chang |
Predictive formulae for OPC with applications to lithography-friendly routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008, pp. 510-515, 2008, ACM, 978-1-60558-115-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
routing, DFM, OPC, lithography, RET |
79 | Rance Rodrigues, Sandip Kundu |
A mask double patterning technique using litho simulation by wavelet transform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, Providence, Rhode Island, USA, May 16-18 2010, pp. 103-106, 2010, ACM, 978-1-4503-0012-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
double patterning lithography, edge placement error, polygon stitch, wavelet transform |
72 | David Z. Pan, Stephen Renwick, Vivek Singh, Judy Huckabay |
Nanolithography and CAD challenges for 32nm/22nm and beyond. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2008 International Conference on Computer-Aided Design, ICCAD 2008, San Jose, CA, USA, November 10-13, 2008, pp. 6, 2008, IEEE Computer Society, 978-1-4244-2820-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
72 | Shiyan Hu, Jiang Hu |
Pattern sensitive placement for manufacturability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2007 International Symposium on Physical Design, ISPD 2007, Austin, Texas, USA, March 18-21, 2007, pp. 27-34, 2007, ACM, 978-1-59593-613-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
placement, physical design, manufacturability |
71 | Yue Xu, Chris Chu |
A matching based decomposer for double patterning lithography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2010 International Symposium on Physical Design, ISPD 2010, San Francisco, California, USA, March 14-17, 2010, pp. 121-126, 2010, ACM, 978-1-60558-920-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
doubel patterning lithography, planar graph, matching algorithm |
71 | Yang-Shan Tong, Chia-Wei Lin, Sao-Jie Chen |
An automatic optical-simulation-based lithography hotspot fix flow for post-route optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2009 International Symposium on Physical Design, ISPD 2009, San Diego, California, USA, March 29 - April 1, 2009, pp. 115-122, 2009, ACM, 978-1-60558-449-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
routing, opc, lithography, hotspot |
71 | Liang Deng, Martin D. F. Wong, Kai-Yuan Chao, Hua Xiang 0001 |
Coupling-aware Dummy Metal Insertion for Lithography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 13-18, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
coupling-aware dummy metal insertion, integrated circuits manufacturing technology, resolution enhancement techniques, off-axis illumination, forbidden pitches, printability improvement, invisible dummy metal segments, lithography cost minimization, optimal algorithm, chemical mechanical polish |
64 | Phiroze N. Parakh, Shankar Krishnamoorthy |
A robust approach to lithography friendly design implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2008 International Symposium on Physical Design, ISPD 2008, Portland, Oregon, USA, April 13-16, 2008, pp. 70, 2008, ACM, 978-1-60558-048-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
64 | Colin P. Williams, Pieter Kok, Hwang Lee, Jonathan P. Dowling |
Quantum lithography: A non-computing application of quantum information. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Inform. Forsch. Entwickl. ![In: Inform. Forsch. Entwickl. 21(1-2), pp. 73-82, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
64 | Edward W. Scheckler, Nelson N. Tam, Anton K. Pfau, Andrew R. Neureuther |
An efficient volume-removal algorithm for practical three-dimensional lithography simulation with experimental verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(9), pp. 1345-1356, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
59 | Pratik J. Shah, Jiang Hu |
Impact of lithography-friendly circuit layout. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, Boston Area, MA, USA, May 10-12 2009, pp. 385-388, 2009, ACM, 978-1-60558-522-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
cd variation, lithography, wirelength, routing congestion |
59 | Dragoljub Gagi Drmanac, Frank Liu 0001, Li-C. Wang |
Predicting variability in nanoscale lithography processes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 545-550, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
modeling variability, photo lithography, machine learning, process variation, kernel methods |
59 | Peng Yu, Sean X. Shi, David Z. Pan |
Process variation aware OPC with variational lithography modeling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006, pp. 785-790, 2006, ACM, 1-59593-381-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
lithography modeling, process variation, OPC |
59 | Jihyun Kim 0001, Sanghyeok Seo, Sung-Shick Kim |
Neural Networks Fusion to Overlay Control System for Lithography Process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Australian Conference on Artificial Intelligence ![In: AI 2006: Advances in Artificial Intelligence, 19th Australian Joint Conference on Artificial Intelligence, Hobart, Australia, December 4-8, 2006, Proceedings, pp. 587-596, 2006, Springer, 3-540-49787-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Run-to-Run Control, Neural Networks, Lithography |
55 | Shankar Krishnamoorthy |
Variation and litho driven physical implementation system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2007 International Symposium on Physical Design, ISPD 2007, Austin, Texas, USA, March 18-21, 2007, pp. 170, 2007, ACM, 978-1-59593-613-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
multi-variation optimization, VLSI, lithography |
53 | Linda Dailey Paulson |
New Lithography Approach Promises Powerful Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 43(1), pp. 17-20, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
bootup, BIOS, United Extensible Firmware Interface, extreme ultraviolet lithography, deep ultraviolet lithography, medical camera, accelerometer, data glove, OS, CMOS image sensor |
52 | Munkang Choi, Linda S. Milor |
Diagnosis of Optical Lithography Faults With Product Test Sets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(9), pp. 1657-1669, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
52 | Manseung Seo, Jaesung Song, Changgeun An |
Region-Based Pattern Generation Scheme for DMD Based Maskless Lithography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GREC ![In: Graphics Recognition. Ten Years Review and Future Perspectives, 6th Internation Workshop, GREC 2005, Hong Kong, China, August 25-26, 2005, Revised Selected Papers, pp. 108-119, 2005, Springer, 978-3-540-34711-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
52 | Nikos Glezos, Ioannis Raptis |
A fast electron beam lithography simulator based on the Boltzmann transport equation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(1), pp. 92-102, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
48 | Andrew B. Kahng |
How to get real mad. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2008 International Symposium on Physical Design, ISPD 2008, Portland, Oregon, USA, April 13-16, 2008, pp. 69, 2008, ACM, 978-1-60558-048-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
design-aware manufacturing, integrated circuit physical design, manufacturing-aware design, performance analysis, design for manufacturability |
47 | Yongchan Ban, David Z. Pan |
Compact modeling and robust layout optimization for contacts in deep sub-wavelength lithography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010, pp. 408-411, 2010, ACM, 978-1-4503-0002-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
optimization, VLSI, DFM, variation, lithography, contact |
47 | Kanak Agarwal |
Frequency domain decomposition of layouts for double dipole lithography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010, pp. 404-407, 2010, ACM, 978-1-4503-0002-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
decomposition, layout, OPC, lithography, OAI, DDL |
47 | Liangliang Yang, Yunfei Zhou, Haihong Pan, Wei Teng |
Realization of the Synchronization Mechanism of Step and Scan Projection Lithography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIRA (2) ![In: Intelligent Robotics and Applications, First International Conference, ICIRA 2008, Wuhan, China, October 15-17, 2008 Proceedings, Part II, pp. 151-161, 2008, Springer, 978-3-540-88516-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Step and scan projection lithography, state synchronization, high speed high precision motion control, synchronization control |
47 | Minsik Cho, Kun Yuan, Yongchan Ban, David Z. Pan |
ELIAD: efficient lithography aware detailed router with compact post-OPC printability prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008, pp. 504-509, 2008, ACM, 978-1-60558-115-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
routing, VLSI, manufacturability, OPC, lithography |
43 | Kwangok Jeong, Andrew B. Kahng, Rasit Onur Topaloglu |
Is overlay error more important than interconnect variations in double patterning? ![Search on Bibsonomy](Pics/bibsonomy.png) |
SLIP ![In: The 11th International Workshop on System-Level Interconnect Prediction (SLIP 2009), San Francisco, CA, USA, July 26-27, 2009, Proceedings, pp. 3-10, 2009, ACM, 978-1-60558-576-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
double patterning lithography, interconnect variations, overlay |
43 | Yufu Zhang, Zheng Shi |
A New Method of Implementing Hierarchical OPC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 8th International Symposium on Quality of Electronic Design (ISQED 2007), 26-28 March 2007, San Jose, CA, USA, pp. 788-794, 2007, IEEE Computer Society, 978-0-7695-2795-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Sub-wavelength Lithography, Cell-wise, EPE, Hierarchy, DFM, OPC, RET |
43 | Puneet Gupta 0001, Andrew B. Kahng, Dennis Sylvester, Jie Yang 0010 |
A cost-driven lithographic correction methodology based on off-the-shelf sizing tools. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003, pp. 16-21, 2003, ACM, 1-58113-688-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
VLSI manufacturability, yield, OPC, lithography, RET |
40 | Yen-Hung Lin, Yih-Lang Li |
Double patterning lithography aware gridless detailed routing with innovative conflict graph. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010, pp. 398-403, 2010, ACM, 978-1-4503-0002-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
double patterning, gridless model, detailed routing |
40 | Kwangok Jeong, Andrew B. Kahng |
Timing analysis and optimization implications of bimodal CD distribution in double patterning lithography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009, pp. 486-491, 2009, IEEE, 978-1-4244-2748-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
40 | Stanley H. Chan, Edmund Y. Lam |
Inverse image problem of designing phase shifting masks in optical lithography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIP ![In: Proceedings of the International Conference on Image Processing, ICIP 2008, October 12-15, 2008, San Diego, California, USA, pp. 1832-1835, 2008, IEEE, 978-1-4244-1765-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
40 | Jinyu Zhang, Wei Xiong, Yan Wang 0023, Zhiping Yu, Min-Chun Tsai |
A highly efficient optimization algorithm for pixel manipulation in inverse lithography technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2008 International Conference on Computer-Aided Design, ICCAD 2008, San Jose, CA, USA, November 10-13, 2008, pp. 480-487, 2008, IEEE Computer Society, 978-1-4244-2820-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
40 | Ritu Singhal, Asha Balijepalli, Anupama R. Subramaniam, Frank Liu 0001, Sani R. Nassif, Yu Cao 0001 |
Modeling and Analysis of Non-Rectangular Gate for Post-Lithography Circuit Simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007, pp. 823-828, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
40 | Peter Wright, Minghui Fan |
A DFM Methodology to Evaluate the Impact of Lithography Conditions on the Speed of Critical Paths in a VLSI Circuit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 7th International Symposium on Quality of Electronic Design (ISQED 2006), 27-29 March 2006, San Jose, CA, USA, pp. 813-817, 2006, IEEE Computer Society, 0-7695-2523-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
40 | Yong-Chan Ban, Soo-Han Choi, Ki-Hung Lee, Dong-Hyun Kim, Jisuk Hong, Yoo-Hyon Kim, Moon-Hyun Yoo, Jeong-Taek Kong |
A Fast Lithography Verification Framework for Litho-Friendly Layout Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 6th International Symposium on Quality of Electronic Design (ISQED 2005), 21-23 March 2005, San Jose, CA, USA, pp. 169-174, 2005, IEEE Computer Society, 0-7695-2301-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
40 | Manish Garg, Laurent Le Cam, Matthieu Gonzalez |
Lithography Driven Layout Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India, pp. 439-444, 2005, IEEE Computer Society, 0-7695-2264-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
40 | Louis Scheffer |
Physical CAD changes to incorporate design for lithography and manufacturability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 2004, pp. 768-773, 2004, IEEE Computer Society, 0-7803-8175-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
40 | Noppachai Anupongpaibool, Soo-Young Lee |
Distributed Correction of Proximity Effect in Electron Beam Lithography on a Heterogeneous Cluster. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), CD-ROM / Abstracts Proceedings, 26-30 April 2004, Santa Fe, New Mexico, USA, 2004, IEEE Computer Society, 0-7695-2132-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
40 | Jun-ho Jeong, Young-suk Sim, Hyonkee Sohn, Eung-sug Lee |
UV Nanoimprint Lithography Using an Elementwise Embossed Stamp. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICMENS ![In: 2004 International Conference on MEMS, NANO, and Smart Systems (ICMENS 2004), 25-27 August 2004, Banff, Alberta, Canada, pp. 233-236, 2004, IEEE Computer Society, 0-7695-2189-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
40 | Linke Jian, Bernd Loechel, Heinz-Ulrich Scheunemann, Martin Bednarzik, Yohannes M. Desta, Jost Goettert |
Fabrication of Ultra Thick, Ultra High Aspect Ratio Microcomponents by Deep and Ultra Deep X-Ray Lithography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICMENS ![In: 2003 International Conference on MEMS, NANO, and Smart Systems (ICMENS 2003), 20-23 July 2003, Banff, Alberta, Canada, pp. 10-14, 2003, IEEE Computer Society, 0-7695-1947-4. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
40 | Ruiqi Tian, Ronggang Yu, Xiaoping Tang, D. F. Wong 0001 |
On mask layout partitioning for electron projection lithography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, ICCAD 2002, San Jose, California, USA, November 10-14, 2002, pp. 514-518, 2002, ACM / IEEE Computer Society, 0-7803-7607-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
40 | Roberto Guerrieri, Karim H. Tadros, John K. Gamelin, Andrew R. Neureuther |
Massively parallel algorithms for scattering in optical lithography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(9), pp. 1091-1100, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
40 | Yoshihiko Hirai, Sadafumi Tomida, Kazushi Ikeda, Masaru Sasago, Masayuki Endo, Sigeru Hayama, Noboru Nomura |
Three-dimensional resist process simulator PEACE (photo and electron beam lithography analyzing computer engineering system). ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(6), pp. 802-807, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
36 | Sani R. Nassif, Kevin J. Nowka |
Physical design challenges beyond the 22nm node. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2010 International Symposium on Physical Design, ISPD 2010, San Francisco, California, USA, March 14-17, 2010, pp. 13-14, 2010, ACM, 978-1-60558-920-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
technology, scaling |
36 | Kristopher Pataky, Oscar Vazquez-Mena, Juergen Brugger |
Nanostencil and InkJet Printing for Bionanotechnology Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NanoNet ![In: Nano-Net - 4th International ICST Conference, Nano-Net 2009, Lucerne, Switzerland, October 18-20, 2009. Proceedings, pp. 222-228, 2009, Springer, 978-3-642-04849-4. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Inkjet, Plasmonics, Cell Patterning, Cell Printing, Nanotechnology, Biosensor, Stencil, Tissue Engineering |
36 | Shayak Banerjee, Praveen Elakkumanan, Lars Liebmann, Michael Orshansky |
Electrically driven optical proximity correction based on linear programming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2008 International Conference on Computer-Aided Design, ICCAD 2008, San Jose, CA, USA, November 10-13, 2008, pp. 473-479, 2008, IEEE Computer Society, 978-1-4244-2820-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
36 | Peng Yu, David Z. Pan |
TIP-OPC: a new topological invariant paradigm for pixel based optical proximity correction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2007 International Conference on Computer-Aided Design, ICCAD 2007, San Jose, CA, USA, November 5-8, 2007, pp. 847-853, 2007, IEEE Computer Society, 1-4244-1382-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
36 | Qi Lin, Mei Ma, Tony Vo, Jenny Fan, Xin Wu, Richard Li, Xiao-Yu Li |
Design-for-Manufacture for Multi Gate Oxide CMOS Process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 8th International Symposium on Quality of Electronic Design (ISQED 2007), 26-28 March 2007, San Jose, CA, USA, pp. 339-343, 2007, IEEE Computer Society, 978-0-7695-2795-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
multi gate oxide, FPGA, layout, yield, DFM |
35 | Jeehong Yang, Serap A. Savari |
A Lossless Circuit Layout Image Compression Algorithm for Maskless Lithography Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DCC ![In: 2010 Data Compression Conference (DCC 2010), 24-26 March 2010, Snowbird, UT, USA, pp. 109-118, 2010, IEEE Computer Society, 978-0-7695-3994-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
Circuit Layout Image, Maskless Lithography System, C4, Block C4, Lossless image compression |
35 | David Abercrombie, Fedor Pikus, Cosmin Cazan |
Use of lithography simulation for the calibration of equation-based design rule checks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 67-70, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
LFD, Leff, equation based DRC, verification, manufacturability, DFM, lithography, DRC |
35 | Zhenhai Zhu |
A parameterized mask model for lithography simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 963-968, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
mask model, parameterized model order reduction, lithography |
35 | Salman Gopalani, Rajesh Garg, Sunil P. Khatri, Mosong Cheng |
A lithography-friendly structured ASIC design approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, Orlando, Florida, USA, May 4-6, 2008, pp. 315-320, 2008, ACM, 978-1-59593-999-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
ASIC, OPC, lithography |
35 | Joydeep Mitra, Peng Yu, David Zhigang Pan |
RADAR: RET-aware detailed routing using fast lithography simulations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005, pp. 369-372, 2005, ACM, 1-59593-058-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
DFM, OPC, lithography, detailed routing, RET |
33 | Seongbo Shim, Youngsoo Shin |
Mask optimization for directed self-assembly lithography: Inverse DSA and inverse lithography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: 21st Asia and South Pacific Design Automation Conference, ASP-DAC 2016, Macao, Macao, January 25-28, 2016, pp. 83-88, 2016, IEEE, 978-1-4673-9569-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
33 | Luis Guillermo Villanueva, Oscar Vazquez-Mena, Cristina Martin-Olmos, Veronica Savu, Katrin Sidler, Juergen Brugger |
Resistless Fabrication of Nanoimprint Lithography (NIL) Stamps Using Nano-Stencil Lithography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Micromachines ![In: Micromachines 4(4), pp. 370-377, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
33 | Hongwen Sun, Jingquan Liu, Di Chen |
Cell Growth Orientated in Substrate Fabricated by Holographic Lithography and Nanoimprint Lithography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
BMEI ![In: Proceedings of the 2nd International Conference on BioMedical Engineering and Informatics, BMEI 2009, October 17-19, 2009, Tianjin, China, pp. 1-4, 2009, IEEE, 978-1-4244-4132-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
33 | Jerome P. Silverman, Robert P. Rippstein, James M. Oberschmidt |
X-ray lithography beamlines in the IBM Advanced Lithography Facility. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IBM J. Res. Dev. ![In: IBM J. Res. Dev. 37(3), pp. 395-410, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
30 | Yongchan Ban, Savithri Sundareswaran, David Z. Pan |
Total sensitivity based dfm optimization of standard library cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2010 International Symposium on Physical Design, ISPD 2010, San Francisco, California, USA, March 14-17, 2010, pp. 113-120, 2010, ACM, 978-1-60558-920-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
optimization, VLSI, sensitivity, DFM, lithography |
30 | Alessandro Carpentiero, Manuela De Leo, Ivan Garcia Romero, Stefano Pozzi Mucelli, Freimut Reuther, Giorgio Stanta, Massimo Tormen, Paolo Ugo, Martina Zamuner |
Nanoelectrochemical Immunosensors for Protein Detection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NanoNet ![In: Nano-Net - 4th International ICST Conference, Nano-Net 2009, Lucerne, Switzerland, October 18-20, 2009. Proceedings, pp. 178-188, 2009, Springer, 978-3-642-04849-4. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Nanoelectrode, electrochemical immunosensor, trastuzumab, voltammetry, electron beam lithography, proteomics |
30 | Stephen P. Kornachuk, Michael C. Smayling |
New strategies for gridded physical design for 32nm technologies and beyond. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2009 International Symposium on Physical Design, ISPD 2009, San Diego, California, USA, March 29 - April 1, 2009, pp. 61-62, 2009, ACM, 978-1-60558-449-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
28nm, 32nm, 45nm, litho, rdr, placement, layout, physical design, manufacturability, lithography, standard cell, vlsi, drc, dfm |
30 | Kun Yuan, Jae-Seok Yang, David Z. Pan |
Double patterning layout decomposition for simultaneous conflict and stitch minimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2009 International Symposium on Physical Design, ISPD 2009, San Diego, California, USA, March 29 - April 1, 2009, pp. 107-114, 2009, ACM, 978-1-60558-449-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
double patterning lithography, layout decomposition, integer linear programming |
30 | Jason Cong, Yi Zou |
Lithographic aerial image simulation with FPGA-based hardwareacceleration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, FPGA 2008, Monterey, California, USA, February 24-26, 2008, pp. 67-76, 2008, ACM, 978-1-59593-934-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
co-processor acceleration, lithography simulation, FPGA |
30 | Steve Leibson, James Kim |
Configurable Processors: A New Era in Chip Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 38(7), pp. 51-59, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
nanometer silicon lithography, microprocessors, multiprocessor systems, MPSoCs, configurable processors |
30 | Lars Liebmann |
Layout impact of resolution enhancement techniques: impediment or opportunity? ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2003 International Symposium on Physical Design, ISPD 2003, Monterey, CA, USA, April 6-9, 2003, pp. 110-117, 2003, ACM, 1-58113-650-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
radically restricted designs, resolution enhancement techniques, design for manufacturability, lithography |
30 | Anton A. Kachayev, David M. Klymyshyn, Sven Achenbach, Volker Saile |
High Vertical Aspect Ratio Liga Microwave 3-DB Coupler. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICMENS ![In: 2003 International Conference on MEMS, NANO, and Smart Systems (ICMENS 2003), 20-23 July 2003, Banff, Alberta, Canada, pp. 38-43, 2003, IEEE Computer Society, 0-7695-1947-4. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
LIGA, deep X-ray lithography, high vertical aspect ratio, microwave directional coupler, coupled lines |
30 | Franklin M. Schellenberg, Luigi Capodieci |
Impact of RET on physical layouts. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2001 International Symposium on Physical Design, ISPD 2001, Sonoma County, CA, USA, April 1-4, 2001, pp. 52-55, 2001, ACM, 1-58113-347-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
off-axis illumination, physical verification, simulation, DFM, OPC, lithography, RET, phase-shifting, PSM |
30 | Michael J. Flynn |
What's ahead in computer design? ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 23rd EUROMICRO Conference '97, New Frontiers of Information Technology, 1-4 September 1997, Budapest, Hungary, pp. 4-, 1997, IEEE Computer Society, 0-8186-8129-2. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
die area improvement, very high level superscalar processors, very large cache, pin bandwidth, processor complexity, scalability, multiprocessors, logic design, instruction level parallelism, VLIW, CMOS technology, lithography, cycle time, computer design, silicon area, cache size |
28 | Caroline Prodhon, Demetrio Macías, Farouk Yalaoui, Alexandre Vial, Lionel Amodeo |
Evolutionary Optimization for Plasmon-Assisted Lithography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EvoWorkshops ![In: Applications of Evolutionary Computing, EvoWorkshops 2009: EvoCOMNET, EvoENVIRONMENT, EvoFIN, EvoGAMES, EvoHOT, EvoIASP, EvoINTERACTION, EvoMUSART, EvoNUM, EvoSTOC, EvoTRANSLOG, Tübingen, Germany, April 15-17, 2009. Proceedings, pp. 420-425, 2009, Springer, 978-3-642-01128-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
28 | Nancy Ying Zhou, Rouwaida Kanj, Kanak Agarwal, Zhuo Li 0001, Rajiv V. Joshi, Sani R. Nassif, Weiping Shi |
The impact of BEOL lithography effects on the SRAM cell performance and yield. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 10th International Symposium on Quality of Electronic Design (ISQED 2009), 16-18 March 2009, San Jose, CA, USA, pp. 607-612, 2009, IEEE Computer Society, 978-1-4244-2952-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
28 | Kun Yuan, Katrina Lu, David Z. Pan |
Double patterning lithography friendly detailed routing with redundant via consideration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 63-66, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
double patterning, redundant via, detailed routing |
28 | Aswin Sreedhar, Alodeep Sanyal, Sandip Kundu |
On Modeling and Testing of Lithography Related Open Faults in Nano-CMOS Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008, pp. 616-621, 2008, ACM, 978-3-9810801-3-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
28 | Puneet Gupta 0001, Andrew B. Kahng, Youngmin Kim, Saumil Shah, Dennis Sylvester |
Investigation of diffusion rounding for post-lithography analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 13th Asia South Pacific Design Automation Conference, ASP-DAC 2008, Seoul, Korea, January 21-24, 2008, pp. 480-485, 2008, IEEE, 978-1-4244-1921-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
28 | Kuen-Yu Tsai, Meng-Fu You, Yi-Chang Lu, Philip C. W. Ng |
A new method to improve accuracy of leakage current estimation for transistors with non-rectangular gates due to sub-wavelength lithography effects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2008 International Conference on Computer-Aided Design, ICCAD 2008, San Jose, CA, USA, November 10-13, 2008, pp. 286-291, 2008, IEEE Computer Society, 978-1-4244-2820-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
28 | Andrew B. Kahng, Chul-Hong Park, Xu Xu 0001, Hailong Yao |
Layout decomposition for double patterning lithography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2008 International Conference on Computer-Aided Design, ICCAD 2008, San Jose, CA, USA, November 10-13, 2008, pp. 465-472, 2008, IEEE Computer Society, 978-1-4244-2820-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
28 | Nancy Ying Zhou, Zhuo Li 0001, Yuxin Tian, Weiping Shi, Frank Liu 0001 |
A New Methodology for Interconnect Parasitics Extraction Considering Photo-Lithography Effects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 450-455, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
28 | Aswin Sreedhar, Sandip Kundu |
On modeling impact of sub-wavelength lithography on transistors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 25th International Conference on Computer Design, ICCD 2007, 7-10 October 2007, Lake Tahoe, CA, USA, Proceedings, pp. 84-90, 2007, IEEE, 1-4244-1258-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
28 | Makoto Sugihara, Taiga Takata, Kenta Nakamura, Ryoichi Inanami, Hiroaki Hayashi, Katsumi Kishimoto, Tetsuya Hasebe, Yukihiro Kawano, Yusuke Matsunaga, Kazuaki J. Murakami, Katsuya Okumura |
A character size optimization technique for throughput enhancement of character projection lithography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
28 | Ke Cao, Sorin Dobre, Jiang Hu |
Standard cell characterization considering lithography induced variations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006, pp. 801-804, 2006, ACM, 1-59593-381-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
process CD, CAD, OPC, design flow, standard cell, RET |
28 | Franck Robin, Esteban Moreno Soriano |
Analysis of fitness functions for electron-beam lithography simulation and evolutionary optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Evol. Comput. ![In: IEEE Trans. Evol. Comput. 8(5), pp. 506-511, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
28 | Pradiptya Ghosh, Chung-shin Kang, Michael Sanie, David Pinto 0003 |
New DFM Approach Abstracts AltPSM Lithography Requirements for sub-100nm IC Design Domains. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 4th International Symposium on Quality of Electronic Design (ISQED 2003), 24-26 March 2003, San Jose, CA, USA, pp. 131-137, 2003, IEEE Computer Society, 0-7695-1881-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
28 | Kenji Harafuji, Akio Misaka, Noboru Nomura, Masahiro Kawamoto, Hirohiko Yamashita |
A novel hierarchical approach for proximity effect correction in electron beam lithography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(10), pp. 1508-1514, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
24 | Ru Huang, HanMing Wu, Jinfeng Kang, DeYuan Xiao, XueLong Shi, Xia An, Yu Tian, Runsheng Wang, Liangliang Zhang, Xing Zhang 0002, Yangyuan Wang |
Challenges of 22 nm and beyond CMOS technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sci. China Ser. F Inf. Sci. ![In: Sci. China Ser. F Inf. Sci. 52(9), pp. 1491-1533, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
22 nm technology node, device architectures, metal gate/high K dielectrics, ultra low K dielectrics, CMOS technology |
24 | Hiroki Sunagawa, Haruhiko Terada, Akira Tsuchiya, Kazutoshi Kobayashi, Hidetoshi Onodera |
Erect of regularity-enhanced layout on printability and circuit performance of standard cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 10th International Symposium on Quality of Electronic Design (ISQED 2009), 16-18 March 2009, San Jose, CA, USA, pp. 195-200, 2009, IEEE Computer Society, 978-1-4244-2952-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
24 | David Z. Pan |
Synergistic modeling and optimization for nanometer IC design/manufacturing integration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2008, Gramado, Brazil, September 1-4, 2008, pp. 2, 2008, ACM, 978-1-60558-231-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
design for manufacturing |
24 | Minsik Cho, Yongchan Ban, David Z. Pan |
Double patterning technology friendly detailed routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2008 International Conference on Computer-Aided Design, ICCAD 2008, San Jose, CA, USA, November 10-13, 2008, pp. 506-511, 2008, IEEE Computer Society, 978-1-4244-2820-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
24 | Jae-Seok Yang, Andrew R. Neureuther |
Crosstalk Noise Variation Assessment and Analysis for the Worst Process Corner. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 352-356, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
worst corner, noise, crosstalk, variation, signal integrity |
24 | Yun Ye, Frank Liu 0001, Sani R. Nassif, Yu Cao 0001 |
Statistical modeling and simulation of threshold variation under dopant fluctuations and line-edge roughness. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008, pp. 900-905, 2008, ACM, 978-1-60558-115-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
atomistic simulations, line-edge roughness, non-rectangular gate, random dopant fluctuations, threshold variation, predictive modeling, SPICE simulation |
24 | Philippe Magarshack |
Design challenges in 45nm and below: DFM, low-power and design for reliability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007, pp. 1, 2007, ACM, 978-1-59593-605-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
design for reliability, low-power design, design for manufacturability |
24 | Jamil Kawa, Charles C. Chiang |
DFM issues for 65nm and beyond. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007, pp. 318-322, 2007, ACM, 978-1-59593-605-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
DFY, DFM |
24 | Yokesh Kumar, Prosenjit Gupta |
Reducing EPL Alignment Errors for Large VLSI Layouts. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 8th International Symposium on Quality of Electronic Design (ISQED 2007), 26-28 March 2007, San Jose, CA, USA, pp. 233-238, 2007, IEEE Computer Society, 978-0-7695-2795-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
24 | Munkang Choi, Linda S. Milor |
Impact on circuit performance of deterministic within-die variation in nanoscale semiconductor manufacturing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(7), pp. 1350-1367, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
24 | Raul Camposano |
Adding Manufacturability to the Quality of Results. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 7th International Symposium on Quality of Electronic Design (ISQED 2006), 27-29 March 2006, San Jose, CA, USA, pp. 511, 2006, IEEE Computer Society, 0-7695-2523-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
24 | Jaidev P. Patwardhan, Vijeta Johri, Chris Dwyer, Alvin R. Lebeck |
A defect tolerant self-organizing nanoscale SIMD architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: Proceedings of the 12th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2006, San Jose, CA, USA, October 21-25, 2006, pp. 241-251, 2006, ACM, 1-59593-451-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
self-organizing, SIMD, data parallel, DNA, defect tolerance, nanocomputing, bit-serial |
24 | Wei Zhang 0012, Niraj K. Jha, Li Shang |
NATURE: a hybrid nanotube/CMOS dynamically reconfigurable architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006, pp. 711-716, 2006, ACM, 1-59593-381-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
NRAM, logic folding, run-time reconfiguration |
24 | André DeHon |
Design of programmable interconnect for sublithographic programmable logic arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, FPGA 2005, Monterey, California, USA, February 20-22, 2005, pp. 127-137, 2005, ACM, 1-59593-029-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Manhattan mesh, sublithographic architecture, programmable logic arrays, nanowires, programmable interconnect |
24 | Soo-Young Lee, Noppachai Anupongpaibool |
Optimization of Distributed Implementation of Grayscale Electron-Beam Proximity Effect Correction on a Temporally Heterogeneous Cluster. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), CD-ROM / Abstracts Proceedings, 4-8 April 2005, Denver, CO, USA, 2005, IEEE Computer Society, 0-7695-2312-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
24 | André DeHon, Michael J. Wilson |
Nanowire-based sublithographic programmable logic arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, FPGA 2004, Monterey, California, USA, February 22-24, 2004, pp. 123-132, 2004, ACM, 1-58113-829-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
sublithographic architecture, programmable logic arrays, nanowires |
24 | Alfred K. Wong |
Microlithography: Trends, Challenges, Solutions, and Their Impact on Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 23(2), pp. 12-21, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
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