Search results for "LDMOS"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
116	Yuehua Dai, Yuan Hu, Qi Liu, Daoming Ke, Junning Chen	Physics-based Modeling and Simulation of Dual Material Gate(DMG) LDMOS.	APCCAS	2006	DBLP DOI BibTeX RDF
70	Shan Gao, Junning Chen, Daoming Ke, Xiulong Wu	A Compact Equivalent Circuit Model of HVLDMOS and Application in HIVC Design.	APCCAS	2006	DBLP DOI BibTeX RDF
55	Radhakrishnan Sithanandam, Mamidala Jagadesh Kumar	A New Hetero-material Stepped Gate (HSG) SOI LDMOS for RF Power Amplifier Applications.	VLSI Design	2010	DBLP DOI BibTeX RDF	LDMOS, breakdown voltage, on-resistance, transconductance, SOI
55	Wei-hai Huang, Yu-jie Dai, Xiao-xing Zhang, Ying-jie Lu	An Oscillator Based on LDMOS Capacitor.	ITNG	2009	DBLP DOI BibTeX RDF	LDMOS, CMOS technology, Oscillator, Capacitor
47	Yogesh Singh Chauhan, François Krummenacher, Renaud Gillon, Benoit Bakeroot, Michel J. Declercq, Adrian M. Ionescu	A New Charge based Compact Model for Lateral Asymmetric MOSFET and its application to High Voltage MOSFET Modeling.	VLSI Design	2007	DBLP DOI BibTeX RDF
47	Clemens Heitzinger, Alireza Sheikholeslami, Jong Mun Park, Siegfried Selberherr	A method for generating structurally aligned grids for semiconductor device simulation.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2005	DBLP DOI BibTeX RDF
45	M. Gares, Hichame Maanane, Mohamed Ali Belaïd, Mohamed Masmoudi, Jérôme Marcon, Karine Mourgues, Pierre Bertram, Philippe Eudeline	Impact de la Temperature sur la Fiabilite des Composants rf Ldmos de Puissance.	CCECE	2006	DBLP DOI BibTeX RDF
45	Antti Heiskanen, Janne Aikio, Timo Rahkonen	A 5th order Volterra study of a 30W LDMOS power amplifier.	ISCAS (4)	2003	DBLP DOI BibTeX RDF
44	Zhihui Yu, Hao Jin, Shurong Dong, Hei Wong, Jie Zeng, Weihuai Wang	Comparative study of reliability degradation behaviors of LDMOS and LDMOS-SCR ESD protection devices.	Microelectron. Reliab.	2016	DBLP DOI BibTeX RDF
23	Oualid Hammi, Slim Boumaiza, Jangheon Kim, Sungchul Hong, Ildu Kim, Bumman Kim, Fadhel M. Ghannouchi	RF Power Amplifiers for Emerging Wireless Communications: Single Branch Vs. Multi-Branch Architectures.	CCECE	2006	DBLP DOI BibTeX RDF
23	Nele V. T. D'Halleweyn, James Benson, William Redman-White, Ketan Mistry, M. Swanenberg	MOOSE: a physically based compact DC model of SOI LD MOSFETs for analogue circuit simulation.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2004	DBLP DOI BibTeX RDF
22	Ping-Ju Chuang, Ali Saadat, Maarten L. Van De Put, Hal Edwards, William G. Vandenberghe	Algorithmic Optimization of Transistors Applied to Silicon LDMOS.	IEEE Access	2023	DBLP DOI BibTeX RDF
22	Lijuan Wu, Gang Yang, Mengjiao Liu, Jiahui Liang, Mengyuan Zhang 0009, Tengfei Zhang	Multi-dimensional accumulation gate LDMOS with ultra-low specific on-resistance.	Microelectron. J.	2023	DBLP DOI BibTeX RDF
22	Yibo Lei, Jian Fang, Yingdong Liang, Yisen Zhang, Ling Yan, Lingli Tang, Xihe Yang, Bo Zhang 0027	Single-event burnout hardening evaluation with current and electric field redistribution of high voltage LDMOS transistors based on TCAD Simulations.	Microelectron. J.	2023	DBLP DOI BibTeX RDF
22	Laura Zunarelli, Luigi Balestra, Susanna Reggiani, Raj Sankaralingam, Mariano Dissegna, Gianluca Boselli	TCAD study of the Holding-Voltage Modulation in Irradiated SCR-LDMOS for HV ESD Protection.	IRPS	2023	DBLP DOI BibTeX RDF
22	Aakanksha Mishra, Boeila Sampath Kumar, M. Monishmurali, Shaik Ahamed Suzaad, Shubham Kumar, Kiran Pote Sanjay, Amit Kumar Singh, Ankur Gupta, Mayank Shrivastava	Extremely Large Breakdown to Snapback Voltage Offset $(\mathrm{V}_{\mathrm{t}1} > > \mathrm{V}_{\text{BD}})$: Another Way to Improve ESD Resilience of LDMOS Devices.	IRPS	2023	DBLP DOI BibTeX RDF
22	Frowin Buballa, Sebastian Linnhoff, Enne Wittenhagen, Urs Hecht, Friedel Gerfers	A 4 GBaud 5 Vpp Class-B Pre-Driver Design for GaN-Based Switching Power Amplifier in 22 nm SOI-CMOS Utilizing LDMOS.	NEWCAS	2023	DBLP DOI BibTeX RDF
22	Yufeng Guo, Kemeng Yang, Jing Chen, Man Li, Zhengfei Jiang, Jiafei Yao, Jun Zhang, Maolin Zhang	Tradeoff Between the Breakdown Voltage and Specific On-Resistance of SOI RESURF LDMOS.	ASICON	2023	DBLP DOI BibTeX RDF
22	Moufu Kong, Zeyu Cheng, Ning Yu, Rui Jin, Jiaxin Guo, Hongqiang Yang	An Ultra-low Specific On-resistance SiC LDMOS Using Double RESURF and Field Plate Techniques.	ASICON	2023	DBLP DOI BibTeX RDF
22	Jun Huang, Ning Ning 0002, Renxiong Li, Qi Ding, Yutuo Guo, Yu Wang, Kunqin He, Yaxin Liu, Lulu Peng	An Ultra-Low Specific On-Resistance LDMOS With Segmented LOCOS In 0.18 μm BCD Process Platform.	ASICON	2023	DBLP DOI BibTeX RDF
22	Amir Gavoshani, Ali A. Orouji	Design considerations of a novel Triple Oxide Trench Deep Gate LDMOS to improve self-heating effect and breakdown voltage.	IET Circuits Devices Syst.	2022	DBLP DOI BibTeX RDF
22	Somsing Rathod, K. S. Beenamole, Kamla Prasan Ray	Design and Characterization of Solid-State LDMOS Based T/R Module.	Wirel. Pers. Commun.	2022	DBLP DOI BibTeX RDF
22	Shunwei Zhu, Hujun Jia, Yintang Yang	A novel LDMOS with optimized electric field distribution to eliminate substrate assisted depletion effect.	Microelectron. J.	2022	DBLP DOI BibTeX RDF
22	Ali Houadef	Extracted Experimental Data of LDMOS Transistors.		2022	DOI RDF
22	Hao Yang Du, Jun-Ichi Matsuda, Anna Kuwana, Haruo Kobayashi 0001	Low Switching Loss Dual RESURF 40 V N-LDMOS with Grounded Field Plate for DC-DC Converters.	MWSCAS	2022	DBLP DOI BibTeX RDF
22	M. Monishmurali, Nagothu Karmel Kranthi, Gianluca Boselli, Mayank Shrivastava	Effect of Source & Drain Side Abutting on the Low Current Filamentation in LDMOS-SCR Devices.	IRPS	2022	DBLP DOI BibTeX RDF
22	Salvatore Cimino, J. Singh, J. B. Johnson, W. Zheng, Y. Chen, W. Liu, P. Srinivasan 0002, O. Gonzales, M. Hauser, Matthew Koskinen, K. Nagahiro, Y. Liu, B. Min, Tanya Nigam, N. Squib	Optimized LDMOS Offering for Power Management and RF Applications.	IRPS	2022	DBLP DOI BibTeX RDF
22	Bikram Kishore Mahajan, Yen-Pu Chen, Ulisses Alberto Heredia Rivera, Rahim Rahimi, Muhammad Ashraful Alam	Correlated Effects of Radiation and Hot Carrier Degradation on the Performance of LDMOS Transistors.	IRPS	2022	DBLP DOI BibTeX RDF
22	Wen Liu, Dimitris P. Ioannou, Johnatan Kantarovsky, Byoung Min, Tanya Nigam	Robust Off-State TDDB Reliability of n-LDMOS.	IRPS	2022	DBLP DOI BibTeX RDF
22	Bikram Kishore Mahajan, Yen-Pu Chen, Muhammad Ashraful Alam, Dhanoop Varghese, Srikanth Krishnan, Vijay Reddy	A Critical Examination of the TCAD Modeling of Hot Carrier Degradation for LDMOS Transistors.	IRPS	2022	DBLP DOI BibTeX RDF
22	Langtao Chen, Xin Zhou, Ying Wang, Ying Kong, Rubin Xie, Ling Peng, Yantu Mo, Ming Qiao, Bo Zhang	Study on Single Event Burnout Effect for 18V LDMOS Based on 0.18µm Process Technology.	APCCAS	2022	DBLP DOI BibTeX RDF
22	Jagamohan Sahoo, Rajat Mahapatra, Amalendu Bhusan Bhattacharayya	An electronically programmable Off-State breakdown voltage in LDMOS transistor with dual-dummy-gate for high voltage ESD protection.	Microelectron. J.	2021	DBLP DOI BibTeX RDF
22	Bikram Kishore Mahajan, Yen-Pu Chen, Dhanoop Varghese, Vijay Reddy, Srikanth Krishnan, Muhammad Ashraful Alam	Quantifying Region-Specific Hot Carrier Degradation in LDMOS Transistors Using a Novel Charge Pumping Technique.	IRPS	2021	DBLP DOI BibTeX RDF
22	Jifa Hao, Yuhang Sun, Amartya Ghosh	Charge pumping source-drain current for gate oxide interface trap density in MOSFETs and LDMOS.	IRPS	2021	DBLP DOI BibTeX RDF
22	Guido T. Sasse, Vignesh Subramanian, Ljubo Radic	Aging models for n- and p-type LDMOS covering low, medium and high VGS operation.	IRPS	2021	DBLP DOI BibTeX RDF
22	Vikas Shilimkar, Kevin Kim	RF LDMOS Transistor Plastic Immunity Enhancement in Power Amplifier Module for 5G Applications.	BCICTS	2021	DBLP DOI BibTeX RDF
22	Anna Kuwana, Jun-Ichi Matsuda, Haruo Kobayashi 0001	Analysis of Switching Characteristics of Wide SOA and High Reliability 100 V N-LDMOS Transistor with Dual RESURF and Grounded Field Plate Structure.	ASICON	2021	DBLP DOI BibTeX RDF
22	Kaushal Kumari Neeraj, Nihar Ranjan Mohapatra	Behavior of LDMOS transistors at cryogenic temperature - An experiment based analysis.	VDAT	2021	DBLP DOI BibTeX RDF
22	Mohamed Ali Belaïd, Ahmed Almusallam, Mohamed Masmoudi	RF performance reliability of power N-LDMOS under pulsed-RF aging life test in radar application S-band.	IET Circuits Devices Syst.	2020	DBLP DOI BibTeX RDF
22	Andrea Natale Tallarico, Susanna Reggiani, Riccardo Depetro, Giuseppe Croce, Enrico Sangiorgi, Claudio Fiegna	Full Understanding of Hot Electrons and Hot/Cold Holes in the Degradation of p-channel Power LDMOS Transistors.	IRPS	2020	DBLP DOI BibTeX RDF
22	Nagothu Karmel Kranthi, Boeila Sampath Kumar, Akram A. Salman, Gianluca Boselli, Mayank Shrivastava	Design Insights to Address Low Current ESD Failure and Power Scalability Issues in High Voltage LDMOS-SCR Devices.	IRPS	2020	DBLP DOI BibTeX RDF
22	Yen-Pu Chen, Bikram Kishore Mahajan, Dhanoop Varghese, Srikanth Krishnan, Vijay Reddy, Muhammad Ashraful Alam	A Novel 'I-V Spectroscopy' Technique to Deconvolve Threshold Voltage and Mobility Degradation in LDMOS Transistors.	IRPS	2020	DBLP DOI BibTeX RDF
22	Nagothu Karmel Kranthi, Chirag Garg, Boeila Sampath Kumar, Akram A. Salman, Gianluca Boselli, Mayank Shrivastava	How to Achieve Moving Current Filament in High Voltage LDMOS Devices: Physical Insights & Design Guidelines for Self-Protected Concepts.	IRPS	2020	DBLP DOI BibTeX RDF
22	Zhaozhao Xu, Donghua Liu, Jun Hu, Feng Jin, Xinjie Yang, Wenting Duan, Wei Yue, Ziquan Fang, Wensheng Qian, Weiran Kong, Shichang Zou	Demonstration of improvement of specific on-resistance versus breakdown voltage tradeoff for low-voltage power LDMOS.	Microelectron. J.	2019	DBLP DOI BibTeX RDF
22	Weizhong Chen, Yao Huang, Shun Li, Lingli Wang, Lijun He, Yi Huang 0011, Zhengsheng Han	A snapback-free RC-LIGBT with separated LDMOS and LIGBT by the L-shaped SiO2 layer.	IEICE Electron. Express	2019	DBLP DOI BibTeX RDF
22	Federico Giuliano, Riccardo Depetro, Giuseppe Croce, Andrea Natale Tallarico, Susanna Reggiani, Antonio Gnudi, Enrico Sangiorgi, Claudio Fiegna, Mattia Rossetti, Antonio Molfese, Stefano Manzini	TCAD predictions of hot-electron injection in p-type LDMOS transistors.	ESSDERC	2019	DBLP DOI BibTeX RDF
22	Lavanya Bandi, Atluri Hemanth, Bhajantri Hemanth Kumar, Adhi Cahyo Wijaya, Gene Sheu	Fully Ion-Implanted 1200V Ldmos with Linear P-Top Technology.	ICCE-TW	2019	DBLP DOI BibTeX RDF
22	Po-Lin Lin, Shen-Li Chen, Pei-Lin Wu, Yu-Lin Jhou, Sheng-Kai Fan	ESD-Reliability Investigation 1of an UHV Elliptical LDMOS-SCR by the Drain-Side Junction Replacement.	ICCE-TW	2019	DBLP DOI BibTeX RDF
22	Hang Li, Kalpathy B. Sundaram, Yuanzhong (Paul) Zhou, Javier A. Salcedo, Jean-Jacques Hajjar	Characterization and Modeling of the Transient Safe Operating Area in LDMOS Transistors.	IRPS	2019	DBLP DOI BibTeX RDF
22	Nagothu Karmel Kranthi, Boeila Sampath Kumar, Akram A. Salman, Gianluca Boselli, Mayank Shrivastava	Physical Insights into the Low Current ESD Failure of LDMOS-SCR and its Implication on Power Scalability.	IRPS	2019	DBLP DOI BibTeX RDF
22	Frederik Vanaverbeke, Michael Satinu, Kevin Kim	Characterization of the Self-Enhanced Class J PA Operating Mode in LDMOS and GaN Transistors.	BCICTS	2019	DBLP DOI BibTeX RDF
22	Anna Kuwana, Jun-Ichi Matsuda, Haruo Kobayashi 0001	Optimization of High Reliability and Wide SOA 100 V LDMOS Transistor with Low Specific On-Resistance.	ASICON	2019	DBLP DOI BibTeX RDF
22	Mengtian Bao, Ying Wang 0041, Xingji Li, Chaoming Liu, Cheng-Hao Yu, Fei Cao	Simulation study of single event effects in the SiC LDMOS with a step compound drift region.	Microelectron. Reliab.	2018	DBLP DOI BibTeX RDF
22	Junji Cheng, Ping Li, Weizhen Chen, Bo Yi, Xingbi Chen	Simulation study of a deep-trench LDMOS with bilateral super-junction drift regions.	MIPRO	2018	DBLP DOI BibTeX RDF
22	Hung-Wei Chen, Mi-Chang Chang	Improving the ESD self-protection capability of 60 V HV p-channel LDMOS large array device in 0.25 μm BCD process.	Microelectron. Reliab.	2017	DBLP DOI BibTeX RDF
22	Matthias Ritter, Martin Pfost	Aging sensors for on-chip metallization of integrated LDMOS transistors under cyclic thermo-mechanical stress.	Microelectron. Reliab.	2017	DBLP DOI BibTeX RDF
22	Andrea Natale Tallarico, Susanna Reggiani, Paolo Magnone, Giuseppe Croce, Riccardo Depetro, P. Gattari, Enrico Sangiorgi, Claudio Fiegna	Investigation of the hot carrier degradation in power LDMOS transistors with customized thick oxide.	Microelectron. Reliab.	2017	DBLP DOI BibTeX RDF
22	Ting-You Lin, Yingchieh Ho, Chauchin Su	LDMOS Channel Thermometer Based on a Thermal Resistance Sensor for Balancing Temperature in Monolithic Power ICs.	Sensors	2017	DBLP DOI BibTeX RDF
22	Hojjat Keshtkar, Erfan Javadiun, Hassan Mansourghanaei	A compact model for the current in LDMOS transistors.	EIT	2017	DBLP DOI BibTeX RDF
22	K. Ben Ali, P. M. Gammon, C. W. Chan, F. Li, V. Pathirana, T. Trajkovic, Farzan Gity, Denis Flandre, Valeria Kilchytska	Single event effects and total ionising dose in 600V Si-on-SiC LDMOS transistors for rad-hard space applications.	ESSDERC	2017	DBLP DOI BibTeX RDF
22	Carlos Bernal, Manuel Jiménez	Adherence of a high-speed RRP LDMOS characterization setup to JESD 24-10 standard.	LASCAS	2017	DBLP DOI BibTeX RDF
22	Sebastian Strache, Leo Rolff, Stefan Dietrich, Michael Hanhart, Tobias Zekorn, Ralf Wunderlich, Stefan Heinen	A digital pulse width modulation closed loop control LDMOS gate driver for LED drivers implemented in a 0.18 μm HV CMOS technology.	CICC	2017	DBLP DOI BibTeX RDF
22	Jifa Hao	Hot carrier reliability in LDMOS devices.	ASICON	2017	DBLP DOI BibTeX RDF
22	Tapas Kumar Maiti, Chinmay K. Maiti	Reduction of Self-heating effect in LDMOS devices.	CoRR	2016	DBLP BibTeX RDF
22	Mohamed Ali Belaïd, H. Kaouach, Jaleleddine Ben Hadj Slama	Evolution study of the ElectroMagnetic Interference for RF LDMOS in series chopper application after thermal accelerated tests.	Microelectron. Reliab.	2016	DBLP DOI BibTeX RDF
22	Hailian Liang, Huafeng Cao, Xiaofeng Gu, Zixiang Guo	Design and optimization of LDMOS-SCR devices with improved ESD protection performance.	Microelectron. Reliab.	2016	DBLP DOI BibTeX RDF
22	Shuai Zhang 0005, Hsiao-Chin Tuan, Xiaojing Wu, Lei Shi, Jian Wu 0004	300-V class power n-channel LDMOS transistor implemented in 0.18-μm silicon-on-insulator (SOI) technology.	Microelectron. Reliab.	2016	DBLP DOI BibTeX RDF
22	Hailian Liang, Xiuwen Bi, Xiaofeng Gu, Huafeng Cao, Yun Zhang	Investigation on LDMOS-SCR with high holding current for high voltage ESD protection.	Microelectron. Reliab.	2016	DBLP DOI BibTeX RDF
22	Xiarong Hu, Weibo Wang, Yupin Ji, Qing Hua	The influence of the N+ floating layer on the drift doping of RESURF LDMOS and its analytical model.	IEICE Electron. Express	2016	DBLP DOI BibTeX RDF
22	Moshe Agam, Jaroslav Pjencak, Dusan Prejda, Agajan Suwhanov, Thierry Yao, Ladislav Seliga	Management of parasitic bipolars in modular high power LDMOS technology.	ESSDERC	2016	DBLP DOI BibTeX RDF
22	Carlos Bernal, Manuel Jiménez	Automated characterization of reverse recovery parameters in high speed LDMOS devices.	MWSCAS	2016	DBLP DOI BibTeX RDF
22	B. Jhnanesh Somayaji, M. S. Bhat 0001	Analysis of implant parameters in high voltage TRIPLE RESURF LDMOS for advanced SoC applications.	ISED	2016	DBLP DOI BibTeX RDF
22	B. A. Mohammed, N. A. Abduljabbar, Mohammed A. G. Al-Sadoon, Khalid W. Hameed, Ash S. Hussaini, Steve M. R. Jones, Fauzi Elmegri, R. W. Clark, Raed Abd-Alhameed	A 15.5 W Si-LDMOS Balanced Power Amplifier with 53% Ultimate PAE for High Speed LTE.	WISATS	2016	DBLP DOI BibTeX RDF
22	Xiangming Xu, Jingfeng Huang, Han Yu, Biao Ma, Peng-Fei Wang, David Wei Zhang	Elimination of stress induced dislocation in deep Poly Sinker LDMOS technology.	Microelectron. Reliab.	2015	DBLP DOI BibTeX RDF
22	Mohamed Ali Belaïd	Impact of hot carrier injection on switching time evolution for power RF LDMOS after accelerated tests.	Microelectron. Reliab.	2015	DBLP DOI BibTeX RDF
22	Shanshan Dai, Ronald W. Knepper, Mark N. Horenstein	A 300-V LDMOS Analog-Multiplexed Driver for MEMS Devices.	IEEE Trans. Circuits Syst. I Regul. Pap.	2015	DBLP DOI BibTeX RDF
22	Shen-Li Chen, Shawn Chang, Yu-Ting Huang, Shun-Bao Chang	Anti-ESD impacts on 60-V P-channel LDMOS devices as none-ODs zone inserting in the bulk region.	ICCE-TW	2015	DBLP DOI BibTeX RDF
22	Shen-Li Chen, Yu-Ting Huang, Shawn Chang, Shun-Bao Chang	ESD reliability building in 0.25 μm 60-V p-channel LDMOS DUTs with different embedded SCRs.	ICCE-TW	2015	DBLP DOI BibTeX RDF
22	Ahmed Aldabbagh, Alistair Duffy	Ageing effects on power RF LDMOS reliability using the Transmission Line Matrix method.	EMC Compo	2015	DBLP DOI BibTeX RDF
22	Xin Zhou, Ming Qiao, Yang Li, Zhaoji Li, Bo Zhang 0027	Effect of field implantation on off- and on-state characteristics for thin layer SOI field P-channel LDMOS.	ASICON	2015	DBLP DOI BibTeX RDF
22	Masashi Higashino, Hitoshi Aoki, Nobukazu Tsukiji, Masaki Kazumi, Takuya Totsuka, Haruo Kobayashi 0001	Study on maximum electric field modeling used for HCI induced degradation characteristic of LDMOS transistors.	ASICON	2015	DBLP DOI BibTeX RDF
22	Jing Deng, Xingbi Chen	A novel SCR-LDMOS for high voltage ESD protection.	ASICON	2015	DBLP DOI BibTeX RDF
22	Mayank Punetha, Yashvir Singh	An integrable trench LDMOS transistor on SOI for RF power amplifiers in PICs.	VDAT	2015	DBLP DOI BibTeX RDF
22	Jie Zeng, Shurong Dong, Lei Zhong, Guo Wei, Yan Han, Weicheng Liu, Hongwei Li, Jun Wang	An area-efficient LDMOS-SCR ESD protection device for the I/O of power IC application.	Microelectron. Reliab.	2014	DBLP DOI BibTeX RDF
22	Hongtao Zhou, Xing Zhou, Francis Benistant	Analytical compact modeling and statistical variability study of LDMOS.	Microelectron. Reliab.	2014	DBLP DOI BibTeX RDF
22	F. Monti, Susanna Reggiani, Gaetano Barone, Elena Gnani, Antonio Gnudi, Giorgio Baccarani, Stefano Poli, Ming-Yeh Chuang, Weidong Tian, D. Varghese, Rick Wise	TCAD analysis of HCS degradation in LDMOS devices under AC stress conditions.	ESSDERC	2014	DBLP DOI BibTeX RDF
22	Alessandro Ferrara, Peter G. Steeneken, Boni K. Boksteen, Anco Heringa, Andries J. Scholten, Jurriaan Schmitz, Raymond J. E. Hueting	Identifying failure mechanisms in LDMOS transistors by analytical stability analysis.	ESSDERC	2014	DBLP DOI BibTeX RDF
22	Bruce C. Kim, Saikat Mondal, Friedrich Taenzler, Kenneth Moushegian	A novel BIST technique for LDMOS drivers.	MWSCAS	2014	DBLP DOI BibTeX RDF
22	Pascal Dherbécourt, Olivier Latry, Eric Joubert, Karine Dehais-Mourgues, Hichame Maanane, Jean Pierre Sipma, Philippe Eudeline	A workbench development for L-band LDMOS amplifier reliability study (electronic power transistors reliabilty for radar applications).	ICMCS	2014	DBLP DOI BibTeX RDF
22	Kejun Xia, Harihara Indana, Usha Gogineni	Compact modeling of LDMOS working in the third quadrant.	CICC	2014	DBLP DOI BibTeX RDF
22	Sukeshwar Kannan, Kaushal Kannan, Bruce C. Kim, Friedrich Taenzler, Richard Antley, Ken Moushegian, Kenneth M. Butler, Doug Mirizzi	Physics-Based Low-Cost Test Technique for High Voltage LDMOS.	J. Electron. Test.	2013	DBLP DOI BibTeX RDF
22	Xiaowu Cai, Junxiu Wei, Chao Liang, Zhe Gao, Chuan Lv	Investigation of high voltage SCR-LDMOS ESD device for 150 V SOI BCD process.	Microelectron. Reliab.	2013	DBLP DOI BibTeX RDF
22	Mohamed Tlig, Jaleleddine Ben Hadj Slama, Mohamed Ali Belaïd	Conducted and radiated EMI evolution of power RF N-LDMOS after accelerated ageing tests.	Microelectron. Reliab.	2013	DBLP DOI BibTeX RDF
22	Xiaoming Yang, Tianqian Li, Yu Cai, Jun Wang, Changjiang Chen	High voltage (>1100V) SOI LDMOS with an accumulated charges layer for double enhanced dielectric electric field.	IEICE Electron. Express	2013	DBLP DOI BibTeX RDF
22	Xiaofei Chen, Yading Shen, Xuecheng Zou, Shuang-Xi Lin, Wanghui Zou	A new high performance RF LDMOS with vertical n+n-p-p+ drain structure.	ASICON	2013	DBLP DOI BibTeX RDF
22	Mohamed Tlig, Jaleleddine Ben Hadj Slama, M. A. Belaid	Power RF N-LDMOS ageing effect on conducted electromagnetic interferences.	SSD	2013	DBLP DOI BibTeX RDF
22	Sukeshwar Kannan, Bruce C. Kim, Anurag Gupta, Friedrich Taenzler, Richard Antley, Ken Moushegian	Physics Based Fault Models for Testing High-Voltage LDMOS.	VLSI Design	2013	DBLP DOI BibTeX RDF
22	Takahiro Iizuka, Takashi Sakuda, Yasunori Oritsuki, Akihiro Tanaka, Masataka Miyake, Hideyuki Kikuchihara, Uwe Feldmann, Hans Jürgen Mattausch, Mitiko Miura-Mattausch	Compact Modeling of Expansion Effects in LDMOS.	IEICE Trans. Electron.	2012	DBLP DOI BibTeX RDF
22	Andreas Mai, Holger Rücker	Complementary RF-LDMOS transistors realized with standard CMOS implantations.	ESSDERC	2012	DBLP DOI BibTeX RDF
22	Susanna Reggiani, Gaetano Barone, Elena Gnani, Antonio Gnudi, Stefano Poli, Ming-Yeh Chuang, Weidong Tian, Rick Wise	TCAD degradation modeling for LDMOS transistors.	ESSDERC	2012	DBLP DOI BibTeX RDF